Author: rksimon
Date: Thu Mar 10 08:16:36 2016
New Revision: 263113
URL: http://llvm.org/viewvc/llvm-project?rev=263113&view=rev
Log:
Minor Wdocumentation fix. NFCI.
Modified:
cfe/trunk/include/clang/ASTMatchers/ASTMatchers.h
Modified: cfe/trunk/include/clang/ASTMatchers/ASTMatchers.h
URL:
Author: rksimon
Date: Thu Mar 10 08:42:17 2016
New Revision: 263115
URL: http://llvm.org/viewvc/llvm-project?rev=263115&view=rev
Log:
Updated SSSE3 builtin tests to more closely match the llvm fast-isel equivalent
tests
Modified:
cfe/trunk/test/CodeGen/ssse3-builtins.c
Modified: cfe/trunk/t
Author: rksimon
Date: Thu Mar 10 08:44:32 2016
New Revision: 263116
URL: http://llvm.org/viewvc/llvm-project?rev=263116&view=rev
Log:
Added note to SSE4a builtins about keeping in sync with llvm tests
Modified:
cfe/trunk/test/CodeGen/sse4a-builtins.c
Modified: cfe/trunk/test/CodeGen/sse4a-bu
Author: rksimon
Date: Thu Mar 10 08:46:49 2016
New Revision: 263117
URL: http://llvm.org/viewvc/llvm-project?rev=263117&view=rev
Log:
Updated SSE3 builtin tests to more closely match the llvm fast-isel equivalent
tests
Modified:
cfe/trunk/test/CodeGen/sse3-builtins.c
Modified: cfe/trunk/tes
Author: rksimon
Date: Sun Mar 20 11:25:23 2016
New Revision: 263908
URL: http://llvm.org/viewvc/llvm-project?rev=263908&view=rev
Log:
Fixed -Wdocumentation warning
Modified:
cfe/trunk/include/clang/Frontend/FrontendAction.h
Modified: cfe/trunk/include/clang/Frontend/FrontendAction.h
URL:
ht
Author: rksimon
Date: Sat Nov 14 06:47:44 2015
New Revision: 253130
URL: http://llvm.org/viewvc/llvm-project?rev=253130&view=rev
Log:
[X86][MMX] Added MMX IR + assembly codegen builtin tests
Improved tests as discussed in PR24580
Modified:
cfe/trunk/test/CodeGen/mmx-builtins.c
Modified: cfe
Author: rksimon
Date: Sat Nov 14 07:25:06 2015
New Revision: 253131
URL: http://llvm.org/viewvc/llvm-project?rev=253131&view=rev
Log:
[X86][MMX] Sorted MMX IR + assembly codegen builtin tests
Makes it easier to track what tests are missing
Modified:
cfe/trunk/test/CodeGen/mmx-builtins.c
Author: rksimon
Date: Sun Nov 15 08:40:31 2015
New Revision: 253169
URL: http://llvm.org/viewvc/llvm-project?rev=253169&view=rev
Log:
[X86][MMX] Added MMX IR + assembly codegen builtin tests for some missing cvt
intrinsics
Modified:
cfe/trunk/test/CodeGen/mmx-builtins.c
Modified: cfe/trunk/
RKSimon added a subscriber: RKSimon.
RKSimon closed this revision.
RKSimon added a comment.
Committed at http://reviews.llvm.org/rL253886
http://reviews.llvm.org/D14215
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Author: rksimon
Date: Sun Nov 29 14:23:00 2015
New Revision: 254262
URL: http://llvm.org/viewvc/llvm-project?rev=254262&view=rev
Log:
[X86][SSE2] Added SSE2 IR + assembly codegen builtin tests
Improved tests as discussed in PR24580
Added:
cfe/trunk/test/CodeGen/sse2-builtins.c
Added: cfe/tr
mail.com>> wrote:
>>
>> This is amazing... And entirely the wrong place for the asm tests. :)
>>
>> Would you mind splitting this test case in two with an IR test for clang and
>> an asm test for llvm?
>>
>> Thanks!
>>
>>
>
gt;> On 29 Nov 2015, at 20:38, Eric Christopher >> <mailto:echri...@gmail.com>> wrote:
>>>
>>> This is amazing... And entirely the wrong place for the asm tests. :)
>>>
>>> Would you mind splitting this test case in two with an IR test f
Author: rksimon
Date: Sat Dec 5 04:37:35 2015
New Revision: 254847
URL: http://llvm.org/viewvc/llvm-project?rev=254847&view=rev
Log:
[X86][F16C] Stripped backend codegen tests
As discussed on the ml, backend tests need to be put in llvm/test/CodeGen/X86
as fast-isel tests using IR that is as cl
Author: rksimon
Date: Sat Dec 5 05:08:51 2015
New Revision: 254848
URL: http://llvm.org/viewvc/llvm-project?rev=254848&view=rev
Log:
Updated test names to match the intrinsics being tested
Modified:
cfe/trunk/test/CodeGen/sse3-builtins.c
cfe/trunk/test/CodeGen/sse4a-builtins.c
Modified:
Author: rksimon
Date: Sat Dec 5 05:12:23 2015
New Revision: 254849
URL: http://llvm.org/viewvc/llvm-project?rev=254849&view=rev
Log:
[X86][3DNow!] Stripped backend codegen tests
As discussed on the ml, backend tests need to be put in llvm/test/CodeGen/X86
as fast-isel tests using IR that is as
Author: rksimon
Date: Tue Dec 8 15:16:45 2015
New Revision: 255050
URL: http://llvm.org/viewvc/llvm-project?rev=255050&view=rev
Log:
[X86][AVX2] Stripped backend codegen tests
As discussed on the ml, backend tests need to be put in llvm/test/CodeGen/X86
as fast-isel tests using IR that is as cl
RKSimon wrote:
Why have the x86 tests been placed in test\CodeGen\X86 instead of something
like test\Transforms\ExpandVariadics\X86 ?
https://github.com/llvm/llvm-project/pull/81058
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Author: Simon Pilgrim
Date: 2024-02-15T10:41:09Z
New Revision: 0636309051f3b1a2b87047770bb3f7df1f3e27c3
URL:
https://github.com/llvm/llvm-project/commit/0636309051f3b1a2b87047770bb3f7df1f3e27c3
DIFF:
https://github.com/llvm/llvm-project/commit/0636309051f3b1a2b87047770bb3f7df1f3e27c3.diff
LOG:
https://github.com/RKSimon commented:
Please can you add constexpr test coverage?
https://github.com/llvm/llvm-project/pull/82359
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RKSimon wrote:
> @RKSimon The builtin currently can't be used with `constexpr`. Support for
> constant evaluation is planned for a follow-up PR unless you would like me to
> add it in this one. Should I remove the `Constexpr` attribute from the
> builtin in Builtins.td for now?
Yes please!
h
@@ -48,6 +48,7 @@ set(sources
X86AvoidStoreForwardingBlocks.cpp
X86DynAllocaExpander.cpp
X86FixupSetCC.cpp
+ X86WinFixupBufferSecurityCheck.cpp
RKSimon wrote:
(style) alpha sorting
https://github.com/llvm/llvm-project/pull/95904
___
@@ -0,0 +1,248 @@
+//=== X86FixupBufferSecurityCheck.cpp Fix Buffer Security Check Call
RKSimon wrote:
Fix filename and '===// 'comment overflow
https://github.com/llvm/llvm-project/pull/95904
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@@ -0,0 +1,247 @@
+//=== X86FixupBufferSecurityCheck.cpp Fix Buffer Security Check
Call---===//
RKSimon wrote:
X86WinFixupBufferSecurityCheck.cpp
https://github.com/llvm/llvm-project/pull/95904
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@@ -0,0 +1,247 @@
+//=== X86FixupBufferSecurityCheck.cpp Fix Buffer Security Check
Call---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,247 @@
+//=== X86FixupBufferSecurityCheck.cpp Fix Buffer Security Check
Call---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
https://github.com/RKSimon commented:
SGTM with a few minors
https://github.com/llvm/llvm-project/pull/95904
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@@ -749,6 +749,11 @@ def TuningUseGLMDivSqrtCosts
: SubtargetFeature<"use-glm-div-sqrt-costs", "UseGLMDivSqrtCosts", "true",
"Use Goldmont specific floating point div/sqrt costs">;
+// Starting with Redwood Cove architecture, the branch has branch taken hint
+// (i
https://github.com/RKSimon edited
https://github.com/llvm/llvm-project/pull/97721
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https://github.com/RKSimon approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/95904
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https://github.com/llvm/llvm-project/pull/95904
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https://github.com/RKSimon approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/107075
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Author: Simon Pilgrim
Date: 2024-09-08T14:07:38+01:00
New Revision: 0f1bc5dbf3c51a1ee33d6037a6a169f0b0fbe217
URL:
https://github.com/llvm/llvm-project/commit/0f1bc5dbf3c51a1ee33d6037a6a169f0b0fbe217
DIFF:
https://github.com/llvm/llvm-project/commit/0f1bc5dbf3c51a1ee33d6037a6a169f0b0fbe217.diff
https://github.com/RKSimon approved this pull request.
LGTM as a base patch (znver4 + extra isas) - we should hold off from cherry
picking into 19.x until we see the scope of the follow up patches.
https://github.com/llvm/llvm-project/pull/107964
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RKSimon wrote:
@ganeshgit Can you address the clang-format warnings please?
https://github.com/llvm/llvm-project/pull/107964
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https://github.com/RKSimon commented:
Would it be possible to split this into PRs per subproject please
(bolt/clang/lld/llvm/mlir)?
https://github.com/llvm/llvm-project/pull/102707
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Author: Simon Pilgrim
Date: 2024-04-04T14:59:00+01:00
New Revision: 110e933b7ae9150710a48b586fd3da39439079c2
URL:
https://github.com/llvm/llvm-project/commit/110e933b7ae9150710a48b586fd3da39439079c2
DIFF:
https://github.com/llvm/llvm-project/commit/110e933b7ae9150710a48b586fd3da39439079c2.diff
Author: Simon Pilgrim
Date: 2024-04-08T14:31:46+01:00
New Revision: 0e8736694f752898ed7957a11a11c42f8f6a98d1
URL:
https://github.com/llvm/llvm-project/commit/0e8736694f752898ed7957a11a11c42f8f6a98d1
DIFF:
https://github.com/llvm/llvm-project/commit/0e8736694f752898ed7957a11a11c42f8f6a98d1.diff
Author: Simon Pilgrim
Date: 2024-04-08T14:31:46+01:00
New Revision: f139387fb6e76a5249e8d7c2d124565e6b566ef4
URL:
https://github.com/llvm/llvm-project/commit/f139387fb6e76a5249e8d7c2d124565e6b566ef4
DIFF:
https://github.com/llvm/llvm-project/commit/f139387fb6e76a5249e8d7c2d124565e6b566ef4.diff
Author: Simon Pilgrim
Date: 2024-04-09T09:59:57+01:00
New Revision: 4ae33c52f794dbd64924dd006570cdc409c297bc
URL:
https://github.com/llvm/llvm-project/commit/4ae33c52f794dbd64924dd006570cdc409c297bc
DIFF:
https://github.com/llvm/llvm-project/commit/4ae33c52f794dbd64924dd006570cdc409c297bc.diff
@@ -22,7 +22,11 @@ class FunctionPointer final {
const Function *Func;
public:
- FunctionPointer() : Func(nullptr) {}
+ // FIXME: We might want to track the fact that the Function pointer
+ // has been created from an integer and is most likely garbage anyway.
+ Function
Author: Simon Pilgrim
Date: 2024-04-10T17:50:13+01:00
New Revision: 798e04f93769318db857b27f51020e7115e00301
URL:
https://github.com/llvm/llvm-project/commit/798e04f93769318db857b27f51020e7115e00301
DIFF:
https://github.com/llvm/llvm-project/commit/798e04f93769318db857b27f51020e7115e00301.diff
@@ -22,7 +22,11 @@ class FunctionPointer final {
const Function *Func;
public:
- FunctionPointer() : Func(nullptr) {}
+ // FIXME: We might want to track the fact that the Function pointer
+ // has been created from an integer and is most likely garbage anyway.
+ Function
Author: Simon Pilgrim
Date: 2024-04-11T14:02:56+01:00
New Revision: 6fd2fdccf2f28fc155f614eec41f785492aad618
URL:
https://github.com/llvm/llvm-project/commit/6fd2fdccf2f28fc155f614eec41f785492aad618
DIFF:
https://github.com/llvm/llvm-project/commit/6fd2fdccf2f28fc155f614eec41f785492aad618.diff
RKSimon wrote:
@aniplcc if the x86 builtins handling is causing a problem - could we split
this so the generic c code intrinsics (andn, blsr etc.) are done first?
https://github.com/llvm/llvm-project/pull/94161
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Author: Simon Pilgrim
Date: 2024-06-19T16:55:33+01:00
New Revision: f7c96d5733915c4ea30dbd7852faffc9cef4aca9
URL:
https://github.com/llvm/llvm-project/commit/f7c96d5733915c4ea30dbd7852faffc9cef4aca9
DIFF:
https://github.com/llvm/llvm-project/commit/f7c96d5733915c4ea30dbd7852faffc9cef4aca9.diff
RKSimon wrote:
I'd prefer we rip off ALL the 3dnow/mmx bandaid in one big series of patches -
and not split across the 19.X/20.X releases.
So can we get all the mmx patches done in time for the 19.0 branch?
Also, this "might" have bigger impact than the KNL changes - should we announce
the p
@@ -7,151 +7,16 @@
*===---===
*/
+// 3dNow intrinsics are no longer supported, and this header remains only as a
+// stub for users who were including it to get to _m_prefetch or
+// _m_prefetchw. Such uses
@@ -1825,32 +1818,32 @@ def : ProcModel;
-def : Proc<"k6-2", [FeatureX87, FeatureCX8, Feature3DNow],
+def : Proc<"k6-2", [FeatureX87, FeatureCX8],
RKSimon wrote:
These still need FeatureMMX and SSEPrefetch (or a similar flag)
https://github.com/llvm/llvm-project
@@ -2296,33 +2296,55 @@ ExprResult
Sema::BuildBlockForLambdaConversion(SourceLocation CurrentLocation,
return BuildBlock;
}
+static FunctionDecl *getPatternFunctionDecl(FunctionDecl *FD) {
+ if (FD->getTemplatedKind() == FunctionDecl::TK_MemberSpecialization) {
+while
Author: Simon Pilgrim
Date: 2024-06-21T17:42:00+01:00
New Revision: 35bfbb3b21e9874d03b730e8ce4eb98b1dcd2d28
URL:
https://github.com/llvm/llvm-project/commit/35bfbb3b21e9874d03b730e8ce4eb98b1dcd2d28
DIFF:
https://github.com/llvm/llvm-project/commit/35bfbb3b21e9874d03b730e8ce4eb98b1dcd2d28.diff
@@ -1825,32 +1818,32 @@ def : ProcModel;
-def : Proc<"k6-2", [FeatureX87, FeatureCX8, Feature3DNow],
+def : Proc<"k6-2", [FeatureX87, FeatureCX8, FeatureMMX],
RKSimon wrote:
I think the best we can do is add FeaturePRFCHW as well?
https://github.com/llvm/llvm-pr
Author: Simon Pilgrim
Date: 2024-05-29T10:38:03+01:00
New Revision: 4bb6974a87e495f19faea4b13475a65e842473f0
URL:
https://github.com/llvm/llvm-project/commit/4bb6974a87e495f19faea4b13475a65e842473f0
DIFF:
https://github.com/llvm/llvm-project/commit/4bb6974a87e495f19faea4b13475a65e842473f0.diff
Author: Simon Pilgrim
Date: 2024-05-29T10:38:03+01:00
New Revision: 9c42ed1371ee8c211aedcfe8aed16662a9befb69
URL:
https://github.com/llvm/llvm-project/commit/9c42ed1371ee8c211aedcfe8aed16662a9befb69
DIFF:
https://github.com/llvm/llvm-project/commit/9c42ed1371ee8c211aedcfe8aed16662a9befb69.diff
Author: Simon Pilgrim
Date: 2024-05-29T10:38:02+01:00
New Revision: f3fb7f569936db418feef98e4ae68777a9a4cd2a
URL:
https://github.com/llvm/llvm-project/commit/f3fb7f569936db418feef98e4ae68777a9a4cd2a
DIFF:
https://github.com/llvm/llvm-project/commit/f3fb7f569936db418feef98e4ae68777a9a4cd2a.diff
@@ -63,6 +63,91 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b)
{
// CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
// CHECK: ret i64 [[RES]]
+//
+// CHECK-I386-LABEL: define dso_local noundef i32 @test_outp(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:
RKSimon wrote:
@FreddyLeaf This is corrupting git checkouts on windows - please can you revert
?
https://github.com/llvm/llvm-project/pull/92338
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https://github.com/RKSimon commented:
Maybe add a line to ReleaseNotes? But otherwise SGTM
https://github.com/llvm/llvm-project/pull/93774
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https://github.com/RKSimon commented:
Maybe add this to ReleaseNotes?
https://github.com/llvm/llvm-project/pull/93804
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RKSimon wrote:
Would it make sense to add a new header (SemaUtils.h? SemaTargetUtils.h?) to
move most of the exposed templated helpers to instead of Sema.h?
https://github.com/llvm/llvm-project/pull/93966
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Pol Marcet =?utf-8?q?Sardà?= ,
Pol Marcet =?utf-8?q?Sardà?= ,
Pol Marcet =?utf-8?q?Sardà?=
Message-ID:
In-Reply-To:
RKSimon wrote:
Other than fixing the ReleaseNotes.rst conflict is there anything outstanding
on this now?
https://github.com/llvm/llvm-project/pull/76615
__
@@ -0,0 +1,97 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 4
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm
-o - | FileCheck %s
+// RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2
https://github.com/RKSimon approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/87273
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RKSimon wrote:
@Amila-Rukshan please can you rebase this patch? merge is currently failing
https://github.com/llvm/llvm-project/pull/87273
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@@ -0,0 +1,64 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 4
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm
-o - | FileCheck %s
RKSimon wrote:
Please can you add the i686
https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/87273
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@@ -728,7 +728,7 @@ class IRIntrinsicResult : public Result {
std::vector ParamTypes;
std::vector Args;
IRIntrinsicResult(StringRef IntrinsicID, std::vector
ParamTypes,
RKSimon wrote:
std::vector ParamTypes?
https://github.com/llvm/llvm-project/pull/89
@@ -660,7 +660,7 @@ class IRBuilderResult : public Result {
std::map IntegerArgs;
IRBuilderResult(StringRef CallPrefix, std::vector Args,
std::set AddressArgs,
RKSimon wrote:
std::set AddressArgs?
https://github.com/llvm/llvm-project/pul
@@ -660,7 +660,7 @@ class IRBuilderResult : public Result {
std::map IntegerArgs;
IRBuilderResult(StringRef CallPrefix, std::vector Args,
RKSimon wrote:
std::vector Args?
https://github.com/llvm/llvm-project/pull/89202
_
https://github.com/RKSimon approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/89551
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https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/89551
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https://github.com/RKSimon edited
https://github.com/llvm/llvm-project/pull/96540
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https://github.com/RKSimon approved this pull request.
LGTM with a couple of minors
https://github.com/llvm/llvm-project/pull/96540
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@@ -159,6 +159,20 @@ AMDGPU Support
X86 Support
^^^
+- The MMX vector intrinsic functions from ``*mmintrin.h`` which
+ operate on `__m64` vectors, such as ``_mm_add_pi8``, have been
+ reimplemented to use the SSE2 instruction-set and XMM registers
+ unconditionally.
@@ -49,12 +49,10 @@ typedef __bf16 __m128bh __attribute__((__vector_size__(16),
__aligned__(16)));
#endif
/* Define the default attributes for the functions in this file. */
-#define __DEFAULT_FN_ATTRS
\
- __attribute__((_
@@ -159,6 +159,20 @@ AMDGPU Support
X86 Support
^^^
+- The MMX vector intrinsic functions from ``*mmintrin.h`` which
+ operate on `__m64` vectors, such as ``_mm_add_pi8``, have been
+ reimplemented to use the SSE2 instruction-set and XMM registers
+ unconditionally.
RKSimon wrote:
GCC thread (for reference):
https://gcc.gnu.org/pipermail/gcc-patches/2024-July/657957.html
https://github.com/llvm/llvm-project/pull/99691
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RKSimon wrote:
@aniplcc reverse ping
https://github.com/llvm/llvm-project/pull/94161
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@@ -171,14 +171,14 @@ constexpr FeatureBitset FeaturesClearwaterforest =
// Geode Processor.
constexpr FeatureBitset FeaturesGeode =
-FeatureX87 | FeatureCMPXCHG8B | FeatureMMX | Feature3DNOW | Feature3DNOWA;
RKSimon wrote:
Do we need to add a FeaturePREF
@@ -171,14 +171,14 @@ constexpr FeatureBitset FeaturesClearwaterforest =
// Geode Processor.
constexpr FeatureBitset FeaturesGeode =
-FeatureX87 | FeatureCMPXCHG8B | FeatureMMX | Feature3DNOW | Feature3DNOWA;
RKSimon wrote:
I think we should add the defin
https://github.com/RKSimon approved this pull request.
LGTM - cheers
https://github.com/llvm/llvm-project/pull/99352
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@@ -43,6 +43,7 @@ typedef unsigned short __mmask16;
/* Rounding mode macros. */
#define _MM_FROUND_TO_NEAREST_INT 0x00
+#define _MM_FROUND_TIES_TO_EVEN 0x00
RKSimon wrote:
(very pedantic) but _MM_FROUND_TO_NEAREST_TIES_EVEN would more closely keep to
https://github.com/RKSimon commented:
Please update the PR subject as its a lot more than just X86AsmParser.cpp
https://github.com/llvm/llvm-project/pull/90391
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https://github.com/RKSimon commented:
Please address the clang-format warnings the CI has reported
https://github.com/llvm/llvm-project/pull/90391
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https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/106766
None
>From 6567d4b48c492a054fcbbfb0f0826d32bbb29404 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Fri, 30 Aug 2024 18:34:27 +0100
Subject: [PATCH] [WIP] Add initial support for arc hyperbolic intrinsics
-
https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/106766
>From 64f9eecea8e3b5cbdd53b0a6f494e1a7c9f7c781 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Fri, 30 Aug 2024 18:34:27 +0100
Subject: [PATCH] [WIP] Add initial support for arc hyperbolic intrinsics
---
cl
https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/106766
>From a4a531a089980c602bc1e7e10e3774186b5b6268 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Fri, 30 Aug 2024 18:34:27 +0100
Subject: [PATCH] [WIP] Add initial support for arc hyperbolic intrinsics
---
cl
RKSimon wrote:
@philnik777 Is this part of a larger scheme covering other targets?
https://github.com/llvm/llvm-project/pull/106005
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RKSimon wrote:
@aniplcc reverse ping
https://github.com/llvm/llvm-project/pull/94161
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RKSimon wrote:
How easy would it be to add an option for this to update inline asm? I'm not
asking you to do this here, I just want to know if this approach would make it
straightforward to add in the future.
https://github.com/llvm/llvm-project/pull/96860
_
RKSimon wrote:
> > How easy would it be to add an option for this to update inline asm? I'm
> > not asking you to do this here, I just want to know if this approach would
> > make it straightforward to add in the future.
>
> Should we touch the inline asm? (GCC doesn't https://godbolt.org/z/o9
https://github.com/RKSimon approved this pull request.
LGTM - cheers
https://github.com/llvm/llvm-project/pull/96860
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https://github.com/RKSimon edited
https://github.com/llvm/llvm-project/pull/96246
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https://github.com/RKSimon approved this pull request.
LGTM with a few minors
https://github.com/llvm/llvm-project/pull/96246
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@@ -481,7 +481,7 @@ defm WriteAESKeyGen : X86SchedWritePair;
// Key Generation.
// Carry-less multiplication instructions.
defm WriteCLMul : X86SchedWritePair;
-// EMMS/FEMMS
RKSimon wrote:
keep these - FEMMS still uses this sched class
https://github.com/l
@@ -936,6 +936,24 @@ X86 Support
^^^
- Remove knl/knm specific ISA supports: AVX512PF, AVX512ER, PREFETCHWT1
+- Support has been removed for the AMD "3DNow!" instruction-set.
+ Neither modern AMD CPUs, nor any Intel CPUs implement these
+ instructions, and they were
@@ -1341,7 +1341,7 @@ defm : Zn4WriteResXMMPair; // Key Gener
// Carry-less multiplication instructions.
defm : Zn4WriteResXMMPair;
-// EMMS/FEMMS
RKSimon wrote:
keep these - FEMMS still uses this sched class
https://github.com/llvm/llvm-project/pull/96246
_
@@ -1301,7 +1301,7 @@ defm : Zn3WriteResXMMPair; // Key Gener
// Carry-less multiplication instructions.
defm : Zn3WriteResXMMPair;
-// EMMS/FEMMS
RKSimon wrote:
keep these - FEMMS still uses this sched class
https://github.com/llvm/llvm-project/pull/96246
@@ -7,7 +7,7 @@
define <2 x i32> @test_pswapdsi(<2 x i32> %a) nounwind readnone {
RKSimon wrote:
update test title
https://github.com/llvm/llvm-project/pull/96246
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@@ -57594,6 +57599,86 @@ static SDValue combinePDEP(SDNode *N, SelectionDAG
&DAG,
return SDValue();
}
+// Fixup the MMX intrinsics' types: in IR they are expressed with <1 x i64>,
RKSimon wrote:
<1 x i64> makes more sense to me to avoid i64 legalization is
https://github.com/RKSimon edited
https://github.com/llvm/llvm-project/pull/98505
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