Hi all!
In the commit https://review.coreboot.org/c/coreboot/+/33565, I tried to
rewrite the Sunruse PCH GPIOs configuration using macros instead of raw
values of the DW0 and DW1 registers.
However, macros from
src/soc/intel/common/block/include/intelblocks/gpio_defs.h can't define the
configurati
u/intel/common/common_init.c is now used.
https://review.coreboot.org/c/coreboot/+/29682
Can I remove legacy code?
Thanks!
// Regards,
// Max
ср, 10 апр. 2019 г. в 20:36, Nico Huber :
> On 10.04.19 14:31, Maxim Poliakov wrote:
> > But, in this case, the loading of the coreboot stops after
Hi all!
I have a problem with disabling the internal Intel GPU in the coreboot for
the Skylake/Kaby Lake processor.
If I understand correctly, in order to disable the iGPU, I must to set
"InternalGfx" to 0 in UPD options for Intel FSP.
https://github.com/coreboot/coreboot/blob/master/src/soc/intel/
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