On June 27, 2022 5:14 PM, Gerd Hoffmann wrote:
> > + #ifdef SECURE_BOOT_FEATURE_ENABLED
> > + PlatformInitEmuVariableNvStore ((VOID *)(UINTN)VariableStore);
> > + #endif
>
> OvmfPkg/Library/NvVarsFileLib/ allows loading variables into emulated
> varstore from a on-disk NvVars file. We can't allo
On June 27, 2022 5:10 PM, Gerd Hoffmann wrote:
> > +VOID *
> > +EFIAPI
> > +PlatformReserveEmuVariableNvStore (
> > + VOID
> > + )
>
> > + DEBUG ((
> > +DEBUG_INFO,
> > +"Reserved variable store memory: 0x%p; size: %dkb\n",
> > +VariableStore,
> > +VarStoreSize / 1024
> > +)
On June 27, 2022 4:41 PM, Gerd Hoffmann wrote:
> On Mon, Jun 27, 2022 at 08:04:06AM +, Min Xu wrote:
> > On June 27, 2022 3:02 PM, Gerd Hoffmann wrote:
> > > On Sun, Jun 26, 2022 at 11:05:50AM +0800, Min Xu wrote:
> > > > From: Min M Xu
> > > >
> > > > TdxValidateCfv validates the integrity of
For below question 1&3:
Since we have defined the PCD for the feature control, should we still need
check the enable case? i though we only add the assert case for not support
case, because we must make sure has the capability to enable it. But for
support case, platform can still disable it via
Hi All,
Intel is pleased to announce that Alder Lake FSP is now available at
https://github.com/intel/FSP.
With Best Regards,
Nate
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Mu
Reviewed-by: Liming Gao
> -邮件原件-
> 发件人: devel@edk2.groups.io 代表 Miki Shindo
> 发送时间: 2022年6月23日 11:40
> 收件人: devel@edk2.groups.io
> 抄送: Michael D Kinney ; Liming Gao
> ; Zhiguang Liu ; Ray Ni
>
> 主题: [edk2-devel] [edk2:PATCH v3] MdePkg/Acpi62: Add type 7 NFIT
> Platform Capabilities Stru
Pushed 6a05ae4630686b5dda91ffd1f8c9a13cae6d079b
Mike
> -Original Message-
> From: Kinney, Michael D
> Sent: Tuesday, June 28, 2022 2:54 PM
> To: Jayaprakash, N ; devel@edk2.groups.io; Kinney,
> Michael D
> Cc: Gao, Liming
> Subject: RE: [edk2 Patch 1/1] Windows-systems.mediawiki: repl
Reviewed-by: Michael D Kinney
> -Original Message-
> From: Jayaprakash, N
> Sent: Monday, June 27, 2022 11:48 PM
> To: devel@edk2.groups.io
> Cc: Kinney, Michael D ; Gao, Liming
>
> Subject: RE: [edk2 Patch 1/1] Windows-systems.mediawiki: replaced p2.7
> reference with py3.7
>
> Cou
Hi SecurityPkg maintainers & reviewers,
I posted this patch series a while back intending to generalize the usage
of a few interfaces from secure boot libraries. Could you please help
reviewing them and provide feedback? Any input is appreciated.
Regards,
Kun
On Mon, Jun 13, 2022 at 1:39 PM Kun
Ensure that the PixelInformation field of the
EFI_GRAPHICS_OUTPUT_MODE_INFORMATION structure is zeroed out in
EFI_GRAPHICS_OUTPUT_PROTOCOL.QueryMode() and
EFI_GRAPHICS_OUTPUT_PROTOCOL.SetMode() when PixelFormat is
PixelBlueGreenRedReserved8BitPerColor.
According to UEFI 2.9 Section 12.9, PixelInfo
On Tue, 28 Jun 2022 at 20:20, Pranav Madhu wrote:
>
> Changes since V1:
> - Rebased on top of latest master branch.
>
> The DSDT ACPI table used for Neoverse reference design platforms include
> the _LPI control method for the kernel to enter idle states. This patch
> series fixes bugs in the exis
RD-N2-Cfg1 platform supports only the platform co-ordinated LPI. So fix
the LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency counter frequency from _LPI object's control method. As
the cpus are directly connected to the intercon
RD-N2 platform supports only the platform co-ordinated LPI. So fix the
LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency counter frequency from _LPI object's control method. As
the cpus are directly connected to the interconnect
RD-V1-MC platform supports only the platform co-ordinated LPI. So fix
the LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency counter frequency from _LPI object's control method.
Signed-off-by: Pranav Madhu
Reviewed-by: Pierre Go
RD-V1 platform supports only the platform co-ordinated LPI. So fix the
LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency counter frequency from _LPI object's control method.
Signed-off-by: Pranav Madhu
Reviewed-by: Pierre Gondo
RD-N1-Edge-X2 platform supports only the platform co-ordinated LPI. So
fix the LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency counter frequency from _LPI object's control method.
Signed-off-by: Pranav Madhu
Reviewed-by: Pier
RD-N1-Edge platform supports only the platform co-ordinated LPI. So fix
the LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency counter frequency from _LPI object's control method.
Signed-off-by: Pranav Madhu
Reviewed-by: Pierre
SGI-575 platform supports only the platform co-ordinated LPI. So fix the
LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency counter frequency from _LPI object's control method.
Signed-off-by: Pranav Madhu
Reviewed-by: Pierre Gon
Changes since V1:
- Rebased on top of latest master branch.
The DSDT ACPI table used for Neoverse reference design platforms include
the _LPI control method for the kernel to enter idle states. This patch
series fixes bugs in the existing _LPI control method due to which
certain high level OS fail
On Tue, 28 Jun 2022 at 18:26, Dimitrije Pavlov wrote:
>
> SBBR requires platforms to provide the _STA ACPI method for each
> defined device. This patch implements a stub method that always
> indicates devices are present and functional.
>
> Cc: Ard Biesheuvel
> Cc: Leif Lindholm
> Cc: Graeme Gre
SBBR requires platforms to provide the _STA ACPI method for each
defined device. This patch implements a stub method that always
indicates devices are present and functional.
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Graeme Gregory
Cc: Radoslaw Biernacki
Cc: Jeff Booher-Kaeding
Cc: Samer El-Ha
From: James Lu
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3967
Add macros to decide modules built into UPL.elf.
Macro list:
- GENERIC_MEMORY_TEST_ENABLE: GenericMemoryTestDxe
- NULL_MEMORY_TEST_ENABLE: NullMemoryTestDxe
- ATA_ENABLE: SataControllerDxe, AtaBusDxe, AtaAtapiPassThruDxe
The iSCSI driver slows down the boot on a pristine variable store flash
image, as it creates a couple of large EFI non-volatile variables to
preserve state between boots.
Since iSCSI boot for VMs is kind of niche anyway, let's default to
disabled. If someone needs it in their build, they can use t
> - //
> - // Check CPUID(CPUID_VERSION_INFO).EDX[12] for MTRR capability
> - //
> - if ((RegEdx & BIT12) != 0) {
> -//
> -// Check MTRR_CAP MSR bit 11 for SMRR support
> -//
> -if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MTRR_CAP) & BIT11) != 0)
> {
> - mSmrrSupported = TRUE;
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3962
Two SMM variables (mSmrrSupported & mSmmFeatureControlSupported) are global
variables, they control whether the SMRR and SMM Feature Control MSR will
be restored respectively.
To avoid the TOCTOU, add PCD to control SMRR & SmmFeatureControl
On Mon, 27 Jun 2022 at 08:40, Pranav Madhu wrote:
>
> RD-N2-Cfg2 platform is the multichip variant of the RD-N2 platform. The
> platform is based on 4xMP1 Neoverse N2 CPUs per chip, CMN-700
> interconnect 6x6 mesh, multiple AXI expansion ports for I/O Coherent
> PCIe, Ethernet, offload and Arm Cor
On Mon, 27 Jun 2022 at 08:05, Pranav Madhu wrote:
>
> Changes since V3:
> - Addressed comments from Pierre Gondois
> - Rebased on top of latest master branch
>
> Changes since V2:
> - Rebased on top of latest master branch
> - Update PPTT table with unique cache ID across the system for different
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