https://bugs.freedesktop.org/show_bug.cgi?id=96625
GitLab Migration User changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=96625
--- Comment #10 from Alex Deucher ---
(In reply to Rui Salvaterra from comment #9)
> (In reply to Christian König from comment #3)
> > Well feel free to provide patches. The relevant source is in
> > src/gallium/drivers/radeon/radeon_uvd.c.
> >
https://bugs.freedesktop.org/show_bug.cgi?id=96625
--- Comment #9 from Rui Salvaterra ---
(In reply to Christian König from comment #3)
> Well feel free to provide patches. The relevant source is in
> src/gallium/drivers/radeon/radeon_uvd.c.
>
> Probably all the 32 and 16 bit fields set into
https://bugs.freedesktop.org/show_bug.cgi?id=96625
--- Comment #8 from Alex Deucher ---
We are happy to apply good patches.
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--- Comment #7 from Christian König ---
Well to answer your question from a technical point of view:
The ring buffers and IBs can be byte swapped by the MC, but in difference to
older generations the hardware does no actively support big
https://bugs.freedesktop.org/show_bug.cgi?id=96625
--- Comment #6 from Mathieu Malaterre ---
Daniel - I've been re-reading my questions twice but completely failed to
understand what you called 'unfair position'.
Christian - Based on Daniel feedback, I sincerely apologize for putting you in
an
https://bugs.freedesktop.org/show_bug.cgi?id=96625
--- Comment #5 from Daniel Stone ---
Mathieu - I don't work for AMD or any related company, but I can tell you that
demanding engineers provide position statements on behalf of 10,000-employee
companies isn't going to work. Christian is an
https://bugs.freedesktop.org/show_bug.cgi?id=96625
--- Comment #4 from Mathieu Malaterre ---
Dear Christian König,
I see that you are working for AMD, so I assume that you are representing your
employer here when you say "[...]pretty trivial to do so, it's just a huge
bunch of work nobody so
https://bugs.freedesktop.org/show_bug.cgi?id=96625
Alex Deucher changed:
What|Removed |Added
Product|DRI |Mesa
QA Contact|
https://bugs.freedesktop.org/show_bug.cgi?id=96625
--- Comment #3 from Christian König ---
Well feel free to provide patches. The relevant source is in
src/gallium/drivers/radeon/radeon_uvd.c.
Probably all the 32 and 16 bit fields set into the message and feedback buffer
in get_h264_msg(),
https://bugs.freedesktop.org/show_bug.cgi?id=96625
--- Comment #2 from intermediadc at hotmail.com
---
and this is bad :-( we are many here with this issue
im facing it on e5500 freescale P5020 and on G5 Quad
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https://bugs.freedesktop.org/show_bug.cgi?id=96625
Christian König changed:
What|Removed |Added
Severity|normal |enhancement
--- Comment #1 from
https://bugs.freedesktop.org/show_bug.cgi?id=96625
Bug ID: 96625
Summary: GPU lockup when using r600g VDPAU on powerpc
Product: DRI
Version: unspecified
Hardware: PowerPC
OS: Linux (All)
Status: NEW
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