I need to send v3. With this v2 set, there is a small bug in the RX
initialization that causes failure on little-endian kernels.
David.
On 11/08/2017 04:51 PM, David Daney wrote:
We are adding the Cavium OCTEON-III network driver. But since
interacting with the input and output queues is do
We are adding the Cavium OCTEON-III network driver. But since
interacting with the input and output queues is done via special CPU
local memory, we also need to add support to the MIPS/Octeon
architecture code. Aren't SoCs nice in this way?
The first six patches add the SoC support needed by the