https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
--- Comment #15 from Jakub Jelinek ---
Author: jakub
Date: Wed Mar 20 11:26:42 2019
New Revision: 269819
URL: https://gcc.gnu.org/viewcvs?rev=269819=gcc=rev
Log:
PR target/89752
* lra-constraints.c (process_alt_operands) : For
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
--- Comment #14 from Jakub Jelinek ---
The following patch fixes the remaining ICE for me:
--- gcc/lra-constraints.c.jj2019-03-16 22:17:21.060937047 +0100
+++ gcc/lra-constraints.c 2019-03-19 11:49:11.982058568 +0100
@@ -2350,6 +2350,8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
--- Comment #13 from Jakub Jelinek ---
Fixed on the originally provided testcase, not on the #c7 testcase, that needs
to be fixed in LRA not to try to reload BLKmode MEMs into REGs.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
--- Comment #12 from Jakub Jelinek ---
Author: jakub
Date: Tue Mar 19 08:11:25 2019
New Revision: 269793
URL: https://gcc.gnu.org/viewcvs?rev=269793=gcc=rev
Log:
PR target/89752
* gimplify.c (gimplify_asm_expr): For output
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
--- Comment #11 from Jakub Jelinek ---
Actually can't bisect, as gcc 8 I have installed is no longer able to build
r215000 or revisions around it (some error on wide-int.h:
../../gcc/wide-int.h:372:10: error: too many template-parameter-lists
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
--- Comment #10 from Wilco ---
It seems that rewriting "+rm" into "=rm" and "0" is not equivalent. Eg.
__asm__ ("" : [a0] "=m" (A0) : "0" (A0));
gives a million warnings "matching constraint does not allow a register", so
"0" appears to imply
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
--- Comment #9 from Jakub Jelinek ---
Bisecting now, r21 still works, r215000 ICEs.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
--- Comment #8 from rguenther at suse dot de ---
On Mon, 18 Mar 2019, jakub at gcc dot gnu.org wrote:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
>
> Jakub Jelinek changed:
>
>What|Removed |Added
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
Jakub Jelinek changed:
What|Removed |Added
CC||jakub at gcc dot gnu.org
--- Comment #7
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
--- Comment #6 from Jakub Jelinek ---
It is on:
__asm__("" : "a0" "=rm" A0, "a1" "=rm" A1 : "0" A0, "1" A1);
where A0 and A1 are variables with LhsPacket type, which is 2 byte
TYPE_ADDRESSABLE aggregate type.
The r in the constraints looks
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
--- Comment #5 from rguenther at suse dot de ---
On Mon, 18 Mar 2019, wilco at gcc dot gnu.org wrote:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
>
> --- Comment #4 from Wilco ---
> Small example which generates the same ICE on every
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
--- Comment #4 from Wilco ---
Small example which generates the same ICE on every GCC version:
typedef struct { int x, y, z; } X;
void f(void)
{
X A0, A1;
__asm__ ("" : [a0] "+rm" (A0),[a1] "+rm" (A1));
}
So it's completely invalid inline
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
--- Comment #3 from Wilco ---
Full instruction:
(insn 531 530 532 19 (parallel [
(set (mem/c:BLK (reg:DI 3842) [29 A0+0 S2 A64])
(asm_operands:BLK ("") ("=rm") 0 [
(mem/c:BLK (reg:DI 3846) [29
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
Wilco changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89752
Richard Biener changed:
What|Removed |Added
Keywords||ice-on-valid-code,
|
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