On Wed, Mar 7, 2018 at 8:26 AM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Tue, Mar 6, 2018 at 5:20 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Mon, Mar 5, 2018 at 3:24 PM, Richard Biener
>> <richard.guent...@gmail.com> wrote:
>>
On Mon, Mar 5, 2018 at 3:24 PM, Richard Biener
wrote:
> On Thu, Feb 8, 2018 at 1:41 AM, Kugan Vivekanandarajah
> wrote:
>> Hi Richard,
>>
>> On 1 February 2018 at 23:21, Richard Biener
>> wrote:
>>> On
Ping^2
Thanks,
bin
On Mon, Feb 19, 2018 at 5:14 PM, Jakub Jelinek wrote:
> Hi!
>
> Honza, do you think you could have a look at this P1 fix?
>
> Thanks.
>
> On Wed, Jan 31, 2018 at 10:03:51AM +, Bin Cheng wrote:
>> Hi,
>> This patch fixes invalid profile count information
On Wed, Jan 31, 2018 at 10:55 AM, Richard Biener
wrote:
> On Tue, Dec 19, 2017 at 4:36 PM, Bin Cheng wrote:
>> HI,
>> This patch backports r254778 and test case in r244815 to GCC6. Bootstrap and
>> test on x86_64. Is it OK?
>
> Ok.
Retested and
On Fri, Jan 19, 2018 at 5:42 PM, Bin Cheng wrote:
> Hi,
> This patch is supposed to fix regression caused by loop distribution when
> ftree-parallelize-loops. The reason is distributed memset call can't be
> understood/analyzed in data reference analysis, as a result, parloop
On Tue, Dec 19, 2017 at 12:56 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Tue, Dec 19, 2017 at 12:58 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Mon, Dec 18, 2017 at 2:35 PM, Michael Matz <m...@suse.de> wrote:
>>> Hi,
>>>
On Mon, Dec 18, 2017 at 2:35 PM, Michael Matz wrote:
> Hi,
>
> On Mon, 18 Dec 2017, Richard Biener wrote:
>
>> where *unroll is similar to *max_vf I think. dist_v[0] is the innermost
>> loop.
>
> [0] is always outermost loop.
>
>> The vectorizer does way more complicated things
On Fri, Dec 15, 2017 at 1:19 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Fri, Dec 15, 2017 at 1:35 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Fri, Dec 15, 2017 at 12:09 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>>> On Fri, Dec
On Fri, Dec 15, 2017 at 12:09 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
> On Fri, Dec 15, 2017 at 11:55 AM, Richard Biener
> <richard.guent...@gmail.com> wrote:
>> On Fri, Dec 15, 2017 at 12:30 PM, Bin Cheng <bin.ch...@arm.com> wrote:
>>> Hi,
>>&g
On Fri, Dec 15, 2017 at 11:55 AM, Richard Biener
wrote:
> On Fri, Dec 15, 2017 at 12:30 PM, Bin Cheng wrote:
>> Hi,
>> As explained in the PR, given below test case:
>> int a[8][10] = { [2][5] = 4 }, c;
>>
>> int
>> main ()
>> {
>> short b;
>>
On Fri, Dec 8, 2017 at 2:40 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Fri, Dec 8, 2017 at 1:43 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Fri, Dec 8, 2017 at 12:17 PM, Richard Biener
>> <richard.guent...@gmail.com> wrote:
>>>
On Fri, Dec 8, 2017 at 3:18 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
> On Fri, Dec 8, 2017 at 2:40 PM, Richard Biener
> <richard.guent...@gmail.com> wrote:
>> On Fri, Dec 8, 2017 at 1:43 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>>> On Fri,
On Fri, Dec 8, 2017 at 2:40 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Fri, Dec 8, 2017 at 1:43 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Fri, Dec 8, 2017 at 12:17 PM, Richard Biener
>> <richard.guent...@gmail.com> wrote:
>>>
On Fri, Dec 8, 2017 at 12:17 PM, Richard Biener
wrote:
> On Fri, Dec 8, 2017 at 12:46 PM, Bin Cheng wrote:
>> Hi,
>> This simple patch makes interchange even more conservative for small loops
>> with constant initialized simple reduction.
>> The
On Fri, Dec 8, 2017 at 10:39 AM, Richard Biener <rguent...@suse.de> wrote:
> On Fri, 8 Dec 2017, Bin.Cheng wrote:
>
>> On Fri, Dec 8, 2017 at 9:54 AM, Richard Biener <rguent...@suse.de> wrote:
>> > On Fri, 8 Dec 2017, Bin.Cheng wrote:
>> >
>> &
On Fri, Dec 8, 2017 at 9:54 AM, Richard Biener <rguent...@suse.de> wrote:
> On Fri, 8 Dec 2017, Bin.Cheng wrote:
>
>> On Fri, Dec 8, 2017 at 8:29 AM, Richard Biener <rguent...@suse.de> wrote:
>> > On Fri, 8 Dec 2017, Christophe Lyon wrote:
>> >
>>
On Fri, Dec 8, 2017 at 8:29 AM, Richard Biener <rguent...@suse.de> wrote:
> On Fri, 8 Dec 2017, Christophe Lyon wrote:
>
>> On 8 December 2017 at 09:07, Richard Biener <rguent...@suse.de> wrote:
>> > On Thu, 7 Dec 2017, Bin.Cheng wrote:
>> >
>> &
On Wed, Dec 6, 2017 at 1:29 PM, Richard Biener wrote:
>
> The following fixes a vectorization issue that appears when trying
> to vectorize the bwaves mat_times_vec kernel after interchange was
> performed by the interchange pass. That interchange inserts the
> following code
On Thu, Dec 7, 2017 at 11:39 AM, Richard Biener
wrote:
> On Thu, Dec 7, 2017 at 11:28 AM, Bin Cheng wrote:
>> Hi,
>> This is the overall loop interchange patch on gimple-linterchange branch.
>> Note the new pass
>> is enabled at -O3 level by
On Tue, Dec 5, 2017 at 1:02 PM, Richard Biener wrote:
>
> This is my final sweep through the code doing cleanup on-the-fly.
Hi,
Thanks very much for all your help!
>
> I think the code is ready to go now (after you committed your changes).
>
> What I'd eventually like to see is
On Mon, Dec 4, 2017 at 5:39 PM, Richard Biener <rguent...@suse.de> wrote:
> On December 4, 2017 5:01:45 PM GMT+01:00, "Bin.Cheng" <amker.ch...@gmail.com>
> wrote:
>>On Mon, Dec 4, 2017 at 3:43 PM, Richard Biener <rguent...@suse.de>
>>wrote:
&g
On Mon, Dec 4, 2017 at 3:43 PM, Richard Biener wrote:
>
> When skimming through the code I noticed the following (chatted on IRC
> about parts of the changes).
>
> Bootstrap / regtest running on x86_64-unknown-linux-gnu.
>
> Will commit tomorrow unless you beat me to that.
>
>
On Mon, Dec 4, 2017 at 1:11 PM, Richard Biener wrote:
>
> I've noticed we perform FP reduction association without the required
> checks for associative math. I've added
> gcc.dg/tree-ssa/loop-interchange-1b.c to cover this.
>
> I also noticed we happily interchange a loop
On Mon, Dec 4, 2017 at 1:11 PM, Richard Biener wrote:
>
> I've noticed we perform FP reduction association without the required
> checks for associative math. I've added
> gcc.dg/tree-ssa/loop-interchange-1b.c to cover this.
>
> I also noticed we happily interchange a loop
On Fri, Dec 1, 2017 at 2:26 PM, Richard Biener <rguent...@suse.de> wrote:
> On Fri, 1 Dec 2017, Bin.Cheng wrote:
>
>> On Fri, Dec 1, 2017 at 12:31 PM, Richard Biener <rguent...@suse.de> wrote:
>> >
>> > This is the access stride computation change. Apart
On Fri, Dec 1, 2017 at 12:31 PM, Richard Biener wrote:
>
> This is the access stride computation change. Apart from the
> stride extraction I adjusted the cost model to handle non-constant
> strides by checking if either is a multiple of the other and
> simply fail
On Thu, Nov 30, 2017 at 3:51 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Thu, Nov 30, 2017 at 4:09 PM, Richard Biener
> <richard.guent...@gmail.com> wrote:
>> On Thu, Nov 30, 2017 at 3:13 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>>> O
On Thu, Nov 30, 2017 at 1:01 PM, Richard Biener
wrote:
> On Tue, Nov 28, 2017 at 4:26 PM, Bin Cheng wrote:
>> Hi,
>> This is updated patch with review comments resolved. Some explanation
>> embedded below.
>>
>>> +
>>> + iloop->nb_iterations =
On Wed, Nov 29, 2017 at 10:02 AM, Richard Biener
wrote:
> On Tue, Nov 28, 2017 at 3:48 PM, Bin Cheng wrote:
>> Hi,
>> This patch renames remove_dead_inserted_code to simple_dce_from_worklist,
>> moves it to tree-ssa-dce.c
>> and makes it a simple
Nov 20, 2017 at 2:46 PM, Richard Biener <richard.guenther@gma
>> il.com> wrote:
>> > On Thu, Nov 16, 2017 at 4:18 PM, Bin.Cheng <amker.ch...@gmail.com>
>> > wrote:
>> > > On Tue, Oct 24, 2017 at 3:30 PM, Michael Matz <m...@suse.de>
>> > > wrote:
&g
Hi Richard,
Thanks for reviewing. It's quite lot comment, I am trying to resolve
it one by one. Here I have some questions as embedded.
On Mon, Nov 20, 2017 at 2:46 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Thu, Nov 16, 2017 at 4:18 PM, Bin.Cheng <amker.ch...@gmai
On Mon, Nov 20, 2017 at 11:02 AM, Richard Biener
wrote:
> On Tue, Nov 7, 2017 at 7:04 PM, Richard Sandiford
> wrote:
>> Richard Biener writes:
>>> On Fri, Nov 3, 2017 at 5:32 PM, Richard Sandiford
>>>
On Fri, Nov 17, 2017 at 3:03 PM, Richard Sandiford
wrote:
> ivopts previously treated pointer arguments to internal functions
> like IFN_MASK_LOAD and IFN_MASK_STORE as normal gimple values.
> This patch makes it treat them as addresses instead. This makes
> a
On Tue, Oct 24, 2017 at 3:30 PM, Michael Matz <m...@suse.de> wrote:
> Hello,
>
> On Fri, 22 Sep 2017, Bin.Cheng wrote:
>
>> This is updated patch for loop interchange with review suggestions
>> resolved. Changes are:
>> 1) It does more light weight c
On Mon, Nov 13, 2017 at 1:20 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Sat, Nov 11, 2017 at 11:19 AM, Bernhard Reutner-Fischer
> <rep.dot@gmail.com> wrote:
>> On Fri, Nov 10, 2017 at 02:14:25PM +, Bin.Cheng wrote:
>>> Hmm, the patch
Hmm, the patch...
Thanks,
bin
On Fri, Nov 10, 2017 at 2:13 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
> On Tue, Nov 7, 2017 at 10:53 AM, Richard Biener
> <richard.guent...@gmail.com> wrote:
>> On Fri, Nov 3, 2017 at 1:40 PM, Bin Cheng <bin.ch...@arm.com> w
On Tue, Nov 7, 2017 at 10:53 AM, Richard Biener
wrote:
> On Fri, Nov 3, 2017 at 1:40 PM, Bin Cheng wrote:
>> Hi,
>> As described in message of previous patch:
>>
>> This patch set fixes both PRs in the opposite way: Instead of find dominance
>>
On Wed, Nov 8, 2017 at 11:55 AM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Tue, Nov 7, 2017 at 1:44 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Tue, Nov 7, 2017 at 12:23 PM, Richard Biener
>> <richard.guent...@gmail.com> wrote:
>>>
On Tue, Nov 7, 2017 at 12:23 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Tue, Nov 7, 2017 at 1:17 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Tue, Nov 7, 2017 at 10:44 AM, Richard Biener
>> <richard.guent...@gmail.com> wrote:
>>>
On Tue, Nov 7, 2017 at 10:44 AM, Richard Biener
wrote:
> On Fri, Nov 3, 2017 at 1:35 PM, Bin Cheng wrote:
>> Hi,
>> This is a simple patch exploiting more undefined pointer overflow behavior in
>> loop niter analysis. Originally, it only supports
On Fri, Nov 3, 2017 at 4:28 PM, Richard Sandiford
wrote:
> This patch improves the ivopts address cost calculcation for modes
> in which an index must be scaled rather than unscaled. Previously
> we would only try the scaled form if the unscaled form was valid.
>
>
On Thu, Oct 19, 2017 at 4:33 PM, Marc Glisse wrote:
> On Thu, 19 Oct 2017, Bin Cheng wrote:
>
>> * match.pd (A +- CST1 CMP A +- CST2): New pattern.
>
>
> Similarly, this has a very large overlap with "X + Z < Y + Z" transforms
> already in match.pd. It may handle X -
On Thu, Oct 19, 2017 at 4:22 PM, Marc Glisse wrote:
> On Thu, 19 Oct 2017, Bin Cheng wrote:
>
>> * match.pd (A + CST cmp A -> CST cmp zero): New simplification
>> for undefined overflow types in (A + CST CMP A -> A CMP' CST').
>
>
> Could you check if you
On Thu, Oct 19, 2017 at 9:31 AM, Tom de Vries wrote:
> On 10/09/2017 03:34 PM, Richard Biener wrote:
>>
>> On Thu, Oct 5, 2017 at 3:16 PM, Bin Cheng wrote:
>>>
>>> Hi,
>>> Function generate_loops_for_partition chooses arbitrary path when
>>> removing
On Mon, Oct 16, 2017 at 5:27 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
> On Mon, Oct 16, 2017 at 5:00 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Mon, Oct 16, 2017 at 2:56 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>>> On Thu, Oct 12, 2017 at 2:43 P
On Mon, Oct 16, 2017 at 5:00 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
> On Mon, Oct 16, 2017 at 2:56 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Thu, Oct 12, 2017 at 2:43 PM, Richard Biener
>> <richard.guent...@gmail.com> wrote:
>>> On Thu,
On Mon, Oct 16, 2017 at 2:56 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
> On Thu, Oct 12, 2017 at 2:43 PM, Richard Biener
> <richard.guent...@gmail.com> wrote:
>> On Thu, Oct 5, 2017 at 3:17 PM, Bin Cheng <bin.ch...@arm.com> wrote:
>>> Hi,
>>> This
On Thu, Oct 12, 2017 at 2:43 PM, Richard Biener
wrote:
> On Thu, Oct 5, 2017 at 3:17 PM, Bin Cheng wrote:
>> Hi,
>> This patch merges adjacent memset builtin partitions if possible. It is
>> a useful special case optimization transforming below
On Thu, Oct 12, 2017 at 2:32 PM, Richard Biener
wrote:
> On Thu, Oct 5, 2017 at 3:17 PM, Bin Cheng wrote:
>> Hi,
>> This patch rewrites classification part of builtin partition so that nested
>> builtin partitions are supported. With this
On Thu, Oct 12, 2017 at 12:13 PM, Richard Biener <rguent...@suse.de> wrote:
> On Thu, 12 Oct 2017, Bin.Cheng wrote:
>
>> On Wed, Oct 11, 2017 at 3:43 PM, Richard Biener <rguent...@suse.de> wrote:
>> >
>> > For PR82355 I introduced a fake dimension to IS
On Wed, Oct 11, 2017 at 3:43 PM, Richard Biener wrote:
>
> For PR82355 I introduced a fake dimension to ISL to allow CHRECs
> having an evolution in a loop that isn't fully part of the SESE
> region we are processing. That was easier than fending off those
> CHRECs (without
On Mon, Oct 9, 2017 at 2:48 PM, Richard Biener
wrote:
> On Thu, Oct 5, 2017 at 3:17 PM, Bin Cheng wrote:
>> Hi,
>> For now distribution pass only handles the innermost loop. This patch
>> extends the pass
>> to cover two-level innermost loop nest.
On Mon, Oct 9, 2017 at 2:33 PM, Richard Biener
wrote:
> On Thu, Oct 5, 2017 at 3:16 PM, Bin Cheng wrote:
>> Hi,
>> Function rename_variables_in_bb skips renaming PHI nodes in loop nest if the
>> outer loop has only one inner loop. This breaks loop
On Sat, Sep 23, 2017 at 6:31 PM, Bernhard Reutner-Fischer
wrote:
> On Fri, Sep 22, 2017 at 11:37:53AM +, Bin Cheng wrote:
>
>> diff --git a/gcc/tree-ssa-loop-manip.c b/gcc/tree-ssa-loop-manip.c
>> index d6ba305..6ad0b75 100644
>> --- a/gcc/tree-ssa-loop-manip.c
>> +++
On Mon, Sep 25, 2017 at 1:46 PM, Richard Biener wrote:
> On Mon, 25 Sep 2017, Richard Biener wrote:
>
>> On Fri, 22 Sep 2017, Richard Biener wrote:
>>
>> >
>> > This simplifies canonicalize_loop_closed_ssa and does other minimal
>> > TLC. It also adds a testcase I reduced from
On Mon, Sep 4, 2017 at 2:54 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Wed, Aug 30, 2017 at 6:32 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Wed, Aug 30, 2017 at 3:19 PM, Richard Biener
>> <richard.guent...@gmail.com> wrote:
>>>
On Fri, Sep 15, 2017 at 12:49 PM, Richard Biener
wrote:
> On Thu, Sep 14, 2017 at 5:02 PM, Bin Cheng wrote:
>> Hi,
>> Current pcom implementation rewrites into lcssa form after all loops are
>> transformed, this is
>> not enough because unrolling
On Mon, Sep 4, 2017 at 2:54 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Wed, Aug 30, 2017 at 6:32 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Wed, Aug 30, 2017 at 3:19 PM, Richard Biener
>> <richard.guent...@gmail.com> wrote:
>>>
On Wed, Aug 30, 2017 at 3:19 PM, Richard Biener
wrote:
> On Wed, Aug 30, 2017 at 3:18 PM, Bin Cheng wrote:
>> Hi,
>> This patch implements a simple loop interchange pass in GCC, as described by
>> its comments:
>> +/* This pass performs loop
On Thu, Aug 17, 2017 at 12:35 PM, Richard Sandiford
<richard.sandif...@linaro.org> wrote:
> "Bin.Cheng" <amker.ch...@gmail.com> writes:
>> On Wed, Aug 16, 2017 at 6:50 PM, Richard Sandiford
>> <richard.sandif...@linaro.org> wrote:
>>> "Bin.C
On Wed, Aug 16, 2017 at 6:50 PM, Richard Sandiford
<richard.sandif...@linaro.org> wrote:
> "Bin.Cheng" <amker.ch...@gmail.com> writes:
>> On Wed, Aug 16, 2017 at 5:00 PM, Richard Sandiford
>> <richard.sandif...@linaro.org> wrote:
>>> "Bin.C
On Wed, Aug 16, 2017 at 5:00 PM, Richard Sandiford
<richard.sandif...@linaro.org> wrote:
> "Bin.Cheng" <amker.ch...@gmail.com> writes:
>> On Wed, Aug 16, 2017 at 2:38 PM, Richard Sandiford
>> <richard.sandif...@linaro.org> wrote:
>>> The first lo
On Wed, Aug 16, 2017 at 2:38 PM, Richard Sandiford
wrote:
> The first loop in the testcase regressed after my recent changes to
> dr_analyze_innermost. Previously we would treat "i" as an iv even
> for bb analysis and end up with:
>
>DR_BASE_ADDRESS: p or q
>
On Wed, Aug 16, 2017 at 10:31 AM, Richard Sandiford
<richard.sandif...@linaro.org> wrote:
> "Bin.Cheng" <amker.ch...@gmail.com> writes:
>> On Tue, Aug 15, 2017 at 6:33 PM, Richard Sandiford
>> <richard.sandif...@linaro.org> wrote:
>>> Richard Bie
On Mon, Aug 14, 2017 at 12:21 PM, Richard Biener
wrote:
> On Mon, Aug 14, 2017 at 1:05 PM, Bin Cheng wrote:
>> Hi,
>> This patch fixes ICE reported in PR81799. It simply uses is_gimple_val
>> rather than is_gimple_condexpr.
>> Bootstap and test on
Ping.
On Fri, Jul 28, 2017 at 12:37 PM, Bin Cheng wrote:
> Hi,
> This simple patch fixes the ICE by adding LTGT in vec_cmp
> pattern.
> I also modified the original test case into a compilation one since
> -fno-wrapping-math
> should not be used in general.
> Bootstrap and
On Tue, Aug 8, 2017 at 1:20 PM, Richard Biener wrote:
>
> The following improves niter analysis for range-based for loops
> by handling ADDR_EXPR in expand_simple_operations.
>
> Bootstrapped on x86_64-unknown-linux-gnu, testing in progress.
>
> Richard.
>
> 2017-08-08 Richard
On Fri, Jun 23, 2017 at 12:04 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Fri, Jun 23, 2017 at 10:47 AM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Fri, Jun 23, 2017 at 6:04 AM, Jeff Law <l...@redhat.com> wrote:
>>> On 06/07/2017 02:07 AM,
On Wed, Aug 2, 2017 at 10:54 AM, Martin Liška <mli...@suse.cz> wrote:
> On 08/02/2017 11:45 AM, Bin.Cheng wrote:
>> Hi Martin,
>> With r250771, GCC failed to build glibc for arm/aarch64 linux cross
>> toolchain:
>
> Hi.
>
> Sorry for the breakage, I accide
On Wed, Aug 2, 2017 at 8:26 AM, Martin Liška wrote:
> On 08/02/2017 09:16 AM, Jakub Jelinek wrote:
>> On Wed, Aug 02, 2017 at 09:13:40AM +0200, Martin Liška wrote:
>>> On 08/01/2017 09:50 PM, Jakub Jelinek wrote:
On Thu, Jul 20, 2017 at 08:59:29AM +0200, Martin Liška wrote:
On Fri, Jul 28, 2017 at 3:15 PM, Richard Sandiford
<richard.sandif...@linaro.org> wrote:
> "Bin.Cheng" <amker.ch...@gmail.com> writes:
>> On Fri, Jul 28, 2017 at 12:55 PM, Richard Sandiford
>> <richard.sandif...@linaro.org> wrote:
>>> Bin Cheng &
On Tue, Aug 1, 2017 at 12:51 PM, Tamar Christina
wrote:
>>
>> Given review comment already pointed out big-endian issue and patch was
>> updated to address it, I would expect reg-test on a big-endian target before
>> applying patch, right?
>
> The patch spent 6 months in
On Mon, Jun 26, 2017 at 11:50 AM, Tamar Christina
wrote:
> Hi all,
>
> Here's the re-spun patch.
> Aside from the grouping of the split patterns it now also uses h register for
> the fmov for HF when available,
> otherwise it forces a literal load.
>
> Regression tested
On Wed, Jun 7, 2017 at 12:38 PM, Tamar Christina
wrote:
> Hi All,
>
>
> This patch lays the ground work to fix the immediate moves for floats
> to use a combination of mov, movi, fmov instead of ldr and adrp to load
> float constants that fit within the 16-bit limit of
On Mon, Jun 26, 2017 at 11:49 AM, Tamar Christina
wrote:
> Hi,
>
> With the changes in the patches the testsuite had a minor update in the
> assembler scan.
> I've posted the patch but will assume it's OK based on the previous OK for
> trunk and
> the fact that this can
On Tue, Jul 25, 2017 at 8:26 AM, Richard Biener
wrote:
> On Mon, Jul 24, 2017 at 10:43 AM, Bin Cheng wrote:
>> Hi,
>> This is a followup patch to PR81388's fix. According to Richi,
>> POINTER_TYPE_OVERFLOW_UNDEFINED was added in -fstrict-overflow
On Tue, Jul 25, 2017 at 12:48 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Mon, Jul 10, 2017 at 10:24 AM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Tue, Jun 27, 2017 at 11:49 AM, Bin Cheng <bin.ch...@arm.com> wrote:
>>> Hi,
>>> T
On Mon, Jun 26, 2017 at 10:57 AM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Mon, Jun 26, 2017 at 11:47 AM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Fri, May 12, 2017 at 12:28 PM, Bin Cheng <bin.ch...@arm.com> wrote:
>>> Hi,
>>>
On Fri, Jun 23, 2017 at 5:56 PM, Jeff Law wrote:
> On 05/12/2017 05:28 AM, Bin Cheng wrote:
>> Hi,
>> This is a simple patch discarding simple element components earlier in
>> predcom.
>> Bootstrap and test on x86_64 and AArch64, is it OK?
>>
>> Thanks,
>> bin
>> 2017-05-10 Bin
On Fri, Jul 28, 2017 at 3:15 PM, Richard Sandiford
<richard.sandif...@linaro.org> wrote:
> "Bin.Cheng" <amker.ch...@gmail.com> writes:
>> On Fri, Jul 28, 2017 at 12:55 PM, Richard Sandiford
>> <richard.sandif...@linaro.org> wrote:
>>> Bin Cheng &
On Fri, Jul 28, 2017 at 12:55 PM, Richard Sandiford
wrote:
> Bin Cheng writes:
>> Hi,
>> This simple patch fixes the ICE by adding LTGT in
>> vec_cmp pattern.
>> I also modified the original test case into a compilation one since
>>
On Wed, Jul 26, 2017 at 11:06 PM, Jonathan Wakely wrote:
> On 26/07/17 20:14 +0200, Paolo Carlini wrote:
>>
>> Hi again,
>>
>> On 26/07/2017 16:27, Paolo Carlini wrote:
>>>
>>> Hi,
>>>
>>> On 26/07/2017 16:21, Andreas Schwab wrote:
ERROR:
On Tue, Jul 25, 2017 at 1:57 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Tue, Jul 25, 2017 at 2:38 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Tue, Jul 25, 2017 at 12:48 PM, Richard Biener
>> <richard.guent...@gmail.com> wrote:
>>> O
On Tue, Jul 25, 2017 at 12:48 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Mon, Jul 10, 2017 at 10:24 AM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Tue, Jun 27, 2017 at 11:49 AM, Bin Cheng <bin.ch...@arm.com> wrote:
>>> Hi,
>>> T
On Mon, Jul 24, 2017 at 3:31 PM, Marc Glisse <marc.gli...@inria.fr> wrote:
> On Mon, 24 Jul 2017, Bin.Cheng wrote:
>
>> On Mon, Jul 24, 2017 at 2:59 PM, Marc Glisse <marc.gli...@inria.fr> wrote:
>>>
>>> On Mon, 24 Jul 2017, Bin.Cheng wrote:
>>>
Ping^1.
Thanks,
bin
On Mon, Jul 10, 2017 at 9:23 AM, Bin.Cheng <amker.ch...@gmail.com> wrote:
> On Tue, Jul 4, 2017 at 1:29 PM, Richard Biener
> <richard.guent...@gmail.com> wrote:
>> On Tue, Jul 4, 2017 at 2:06 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>&
On Mon, Jul 24, 2017 at 2:59 PM, Marc Glisse <marc.gli...@inria.fr> wrote:
> On Mon, 24 Jul 2017, Bin.Cheng wrote:
>
>> But since definition of _197 isn't in current stmt sequence, call "o31
>> = do_valueize (valueize, o31)" will return NULL. As a result, it's
&g
On Mon, Jul 24, 2017 at 1:16 PM, Marc Glisse <marc.gli...@inria.fr> wrote:
> On Mon, 24 Jul 2017, Bin.Cheng wrote:
>
>>> For _123, we have
>>>
>>> /* (A +- CST1) +- CST2 -> A + CST3
>>> or
>>> /* Associate (p +p off1) +p off
On Fri, Jun 16, 2017 at 5:48 PM, Marc Glisse <marc.gli...@inria.fr> wrote:
> On Fri, 16 Jun 2017, Bin.Cheng wrote:
>
>> On Fri, Jun 16, 2017 at 5:16 PM, Richard Biener
>> <richard.guent...@gmail.com> wrote:
>>>
>>>
>>> That means we miss a
On Fri, Jul 21, 2017 at 8:12 AM, Richard Biener wrote:
>
> The following is sth I noticed when looking at a way to fix PR81303.
> We happily compute a runtime cost model threshold that executes the
> vectorized variant even though no vector iteration takes place due
> to the
On Fri, Jul 14, 2017 at 12:12 PM, James Greenhalgh
wrote:
> On Wed, Jul 12, 2017 at 03:15:04PM +, Bin Cheng wrote:
>> Hi,
>> After change @236817, AArch64 backend could avoid unnecessary conversion
>> instructions for register between different modes now. As a
On Tue, Jul 18, 2017 at 9:31 AM, Richard Biener
wrote:
> On Tue, Jul 18, 2017 at 10:00 AM, Bin Cheng wrote:
>> Hi,
>> I removed unsafe loop optimization on TREE level last year, so GCC doesn't
>> do unsafe
>> loop optimizations on TREE now. All
On Mon, Jul 17, 2017 at 1:09 PM, Christophe Lyon
<christophe.l...@linaro.org> wrote:
> On 17 July 2017 at 12:06, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Mon, Jul 10, 2017 at 10:32 AM, Christophe Lyon
>> <christophe.l...@linaro.org> wrote:
>>>
On Mon, Jul 10, 2017 at 10:32 AM, Christophe Lyon
<christophe.l...@linaro.org> wrote:
> Hi Bin,
>
> On 30 June 2017 at 12:43, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Wed, Jun 28, 2017 at 2:09 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>>> On We
On Mon, Jul 10, 2017 at 10:32 AM, Christophe Lyon
<christophe.l...@linaro.org> wrote:
> Hi Bin,
>
> On 30 June 2017 at 12:43, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Wed, Jun 28, 2017 at 2:09 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>>> On We
On Tue, Jun 27, 2017 at 11:49 AM, Bin Cheng wrote:
> Hi,
> This is a followup patch better handling below case:
> for (i = 0; i < n; i++)
>{
> a[i] = 1;
> a[i+2] = 2;
>}
> Instead of generating root variables by loading from memory and
On Tue, Jul 4, 2017 at 1:29 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Tue, Jul 4, 2017 at 2:06 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Tue, Jul 4, 2017 at 12:19 PM, Richard Biener
>> <richard.guent...@gmail.com> wrote:
>>>
On Fri, Jun 30, 2017 at 5:09 PM, Jeff Law wrote:
> On 06/14/2017 07:08 AM, Bin Cheng wrote:
>> Hi,
>> Loop split currently generates below control flow graph for split loops:
>> +
>> + .-- guard1 --.
>> + v v
>> +
On Mon, Jul 3, 2017 at 5:12 PM, Jeff Law wrote:
> On 04/18/2017 04:54 AM, Bin Cheng wrote:
>> Hi,
>> This is the same patch posted at
>> https://gcc.gnu.org/ml/gcc-patches/2016-05/msg02000.html,
>> after rebase against this patch series. This patch was blocked because
>>
On Tue, Jul 4, 2017 at 12:19 PM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Mon, Jul 3, 2017 at 4:17 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>> On Mon, Jul 3, 2017 at 10:38 AM, Richard Biener
>> <richard.guent...@gmail.com> wrote:
>>> O
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