Re: ARM: Clear icache when creating a closure

2011-07-26 Thread Andrew Haley
On 07/25/2011 10:33 AM, Andrew Haley wrote: > On 21/07/11 16:33, Joseph S. Myers wrote: >> My suggestion would be putting the instruction sequence in a .s file, >> rather than hardcoding the instruction encodings here, and writing the >> code to read from the sequence as assembled by the assemble

Re: ARM: Clear icache when creating a closure

2011-07-25 Thread Andrew Haley
On 21/07/11 16:33, Joseph S. Myers wrote: > On Tue, 12 Jul 2011, Andrew Haley wrote: > *(unsigned int*) &__tramp[0] = 0xe92d000f; /* stmfd sp!, {r0-r3} */ \ *(unsigned int*) &__tramp[4] = 0xe59f; /* ldr r0, [pc] */ \ *(unsigned int*) &__tramp[8] = 0xe59ff000; /

Re: ARM: Clear icache when creating a closure

2011-07-21 Thread Joseph S. Myers
On Tue, 12 Jul 2011, Andrew Haley wrote: > >> *(unsigned int*) &__tramp[0] = 0xe92d000f; /* stmfd sp!, {r0-r3} */ \ > >> *(unsigned int*) &__tramp[4] = 0xe59f; /* ldr r0, [pc] */ \ > >> *(unsigned int*) &__tramp[8] = 0xe59ff000; /* ldr pc, [pc] */ \ > > Your patch look

Re: ARM: Clear icache when creating a closure

2011-07-12 Thread Richard Earnshaw
On 12/07/11 10:15, Andrew Haley wrote: > On 12/07/11 10:12, Richard Earnshaw wrote: >> On 11/07/11 17:23, Andrew Haley wrote: >>> On a multicore ARM, you really do have to clear both caches, not just the >>> dcache. This bug may exist in other ports too. >>> >>> Andrew. >>> >>> >>> 2011-07-11 And

Re: ARM: Clear icache when creating a closure

2011-07-12 Thread Andrew Haley
On 12/07/11 10:12, Richard Earnshaw wrote: > On 11/07/11 17:23, Andrew Haley wrote: >> On a multicore ARM, you really do have to clear both caches, not just the >> dcache. This bug may exist in other ports too. >> >> Andrew. >> >> >> 2011-07-11 Andrew Haley >> >> * src/arm/ffi.c (FFI_IN

Re: ARM: Clear icache when creating a closure

2011-07-12 Thread Richard Earnshaw
On 11/07/11 17:23, Andrew Haley wrote: > On a multicore ARM, you really do have to clear both caches, not just the > dcache. This bug may exist in other ports too. > > Andrew. > > > 2011-07-11 Andrew Haley > > * src/arm/ffi.c (FFI_INIT_TRAMPOLINE): Clear icache. > > diff --git a/sr

ARM: Clear icache when creating a closure

2011-07-11 Thread Andrew Haley
On a multicore ARM, you really do have to clear both caches, not just the dcache. This bug may exist in other ports too. Andrew. 2011-07-11 Andrew Haley * src/arm/ffi.c (FFI_INIT_TRAMPOLINE): Clear icache. diff --git a/src/arm/ffi.c b/src/arm/ffi.c index 885a9cb..b2e7667 100644 ---