Re: gEDA-user: about DJ

2006-11-06 Thread DJ Delorie
I forgot DJ's web URL, so did a google search. Here's what turned up: http://en.wikipedia.org/wiki/DJ_Delorie Pretty cool, DJ. How'd you get in there? Don't know. I know djgpp's been in there for a while. ___ geda-user mailing list

Re: gEDA-user: PCB's at 10 GHz or 2.5THz?

2006-11-06 Thread Karel Kulhavy
On Sun, Nov 05, 2006 at 03:57:13PM -0500, Bob Paddock wrote: Someone asked me if I could do a PCB layout for them at 10 GHz. I know there are a lot of very expensive packages out there for doing this kind of thing, those are not in my budget. How high a frequency has anyone here done?

Re: gEDA-user: no pins in JUMPER10

2006-11-06 Thread Giorgenes Gelatti
I didn't put footprints in some components becouse I didn't get any error about that. They seem to have a default footprint already. Is it a problem to leave the default footprints? 2006/11/6, John Luciani [EMAIL PROTECTED]: On 11/5/06, Giorgenes Gelatti [EMAIL PROTECTED] wrote: i'm sending my

Re: gEDA-user: replicating pcb layout cells

2006-11-06 Thread John Luciani
On 11/5/06, John Griessen [EMAIL PROTECTED] wrote: The script works fine with the latest element file format even though he made it before it existed. Thats because the (x,y) data for each type of record type (Element, Line, .. etc) is in the same position in the record and all other data is

Re: gEDA-user: PIC TQFP symbol

2006-11-06 Thread Vaughn Treude
Mark Rages wrote: On 11/4/06, Vaughn Treude [EMAIL PROTECTED] wrote: John Luciani wrote: On 11/4/06, Vaughn Treude [EMAIL PROTECTED] wrote: Hello all: Excuse me if I've missed this in some obvious place, but I can't find a symbol in standard library for the TQFP version of the PIC18F4420.

Re: gEDA-user: replicating pcb layout cells

2006-11-06 Thread bumpelo
The script works fine with the latest element file format even though he made it before it existed. Thats because the (x,y) data for each type of record type (Element, Line, .. etc) is in the same position in the record and all other data is output verbatim. This could break if the

Re: gEDA-user: replicating pcb layout cells

2006-11-06 Thread John Luciani
On 11/6/06, [EMAIL PROTECTED] [EMAIL PROTECTED] wrote: The script works fine with the latest element file format even though he made it before it existed. Thats because the (x,y) data for each type of record type (Element, Line, .. etc) is in the same position in the record and all

Re: gEDA-user: no pins in JUMPER10

2006-11-06 Thread Giorgenes Gelatti
I got a simpler circuit that is not working. I have snap turned on, but can't see a way of making it works :( 2006/11/6, John Luciani [EMAIL PROTECTED]: On 11/6/06, Giorgenes Gelatti [EMAIL PROTECTED] wrote: I didn't put footprints in some components becouse I didn't get any error about

Re: gEDA-user: replicating pcb layout cells

2006-11-06 Thread John Griessen
John Luciani wrote: The script works fine with the latest element file format even though he made it before it existed. Thats because the . . . . On 11/6/06, [EMAIL PROTECTED] [EMAIL PROTECTED] wrote: I'm not sure what your script does, but I would think that the real because reason

Re: gEDA-user: furnace controller I/O port again

2006-11-06 Thread Greg Cunningham
On Fri, 2006-11-03 at 15:36, DJ Delorie wrote: Which frequently gets people into trouble when they try to use Op-Amps as Comparators: ... The lines will (initially, at least) carry 1wire (1-15 uS pulses) and RS-232 (9600 baud). ... DJ, Are you writing code for the Dallas 1-wire protocol?

Re: gEDA-user: no pins in JUMPER10

2006-11-06 Thread John Luciani
On 11/6/06, Giorgenes Gelatti [EMAIL PROTECTED] wrote: I got a simpler circuit that is not working. I have snap turned on, but can't see a way of making it works :( What specifically isn't working? the netlist produced --- unnamed_net9serial-2 pinbar-9 unnamed_net8serial-1 pinbar-10

Re: gEDA-user: furnace controller I/O port again

2006-11-06 Thread ldoolitt
Friends - On Mon, Nov 06, 2006 at 07:08:48PM -0500, DJ Delorie wrote: DJ, Are you writing code for the Dallas 1-wire protocol? Neat. Lots of bit banging. If anyone wants FPGA code for 1-Wire, I have some. You can either click through the stupid (but innocuous) licence agreement at

gEDA-user: Open SDSL project mailing list

2006-11-06 Thread Michael Sokolov
Since a number of people here have found my open SDSL connectivity project interesting, I have set up a mailing list for it so that the interested people can discuss it without cluttering this and other lists with OT posts. Send subscription requests to: [EMAIL PROTECTED] It's also listed on