On 3/28/2018 2:05 AM, Michal Wajdeczko wrote:
v2: except running with HYPERVISOR
Signed-off-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
drivers/gpu/drm/i915/intel_uc.c| 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff
== Series Details ==
Series: Add NV12 support (rev5)
URL : https://patchwork.freedesktop.org/series/39670/
State : success
== Summary ==
Known issues:
Test kms_flip:
Subgroup 2x-flip-vs-expired-vblank-interruptible:
pass -> FAIL (shard-hsw) fdo#102887
On Wed, Mar 28, 2018 at 10:38:35AM +0300, Oleksandr Andrushchenko wrote:
> From: Noralf Trønnes
>
> Use srcu to protect drm_device.unplugged in a race free manner.
> Drivers can use drm_dev_enter()/drm_dev_exit() to protect and mark
> sections preventing access to device
Quoting Daniele Ceraolo Spurio (2018-03-23 19:17:49)
>
>
> On 23/03/18 05:34, Michał Winiarski wrote:
> > We're seeing "RPM wakelock ref not held during HW access" warning
> > otherwise. And since IRQ are synced for runtime suspend, we can use the
> > variant without wakeref assert.
> >
> >
Chris Wilson writes:
> Now that we reload both RING_HEAD and RING_TAIL when rebinding the
> context, we do not need to scrub those registers immediately on resume.
>
> v2: Handle the perma-pinned contexts.
>
> Signed-off-by: Chris Wilson
> Cc:
== Series Details ==
Series: drm/i915/selftests: Add basic sanitychecks for execlists
URL : https://patchwork.freedesktop.org/series/40805/
State : success
== Summary ==
Series 40805v1 drm/i915/selftests: Add basic sanitychecks for execlists
== Series Details ==
Series: drm: Use srcu to protect drm_device.unplugged
URL : https://patchwork.freedesktop.org/series/40793/
State : success
== Summary ==
Known issues:
Test kms_flip:
Subgroup 2x-plain-flip-ts-check-interruptible:
fail -> PASS
== Series Details ==
Series: drm/i915/selftests: Add basic sanitychecks for execlists
URL : https://patchwork.freedesktop.org/series/40805/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
90e2fd06c407 drm/i915/selftests: Add basic sanitychecks for execlists
-:43:
Quoting Michał Winiarski (2018-03-23 14:34:04)
> We're seeing "RPM wakelock ref not held during HW access" warning
> otherwise. And since IRQ are synced for runtime suspend, we can use the
> variant without wakeref assert.
>
> Reported-by: Marta Löfstedt
> Bugzilla:
Before adding a new feature to execlists submission, we should endeavour
to cover the baseline behaviour with selftests. So start the ball
rolling.
Signed-off-by: Chris Wilson
Cc: Michał Winiarski
CC: Michel Thierry
Quoting Joonas Lahtinen (2018-03-28 14:27:19)
> Quoting Jackie Li (2018-03-23 01:59:22)
> > GuC Address Space and WOPCM Layout diagrams won't be generated correctly by
> > sphinx build if not using proper reST syntax.
> >
> > This patch uses reST literal blocks to make sure GuC Address Space and
On 28/03/18 00:39, Paulo Zanoni wrote:
Em Ter, 2018-03-27 às 15:42 -0700, Paulo Zanoni escreveu:
Em Sex, 2018-03-23 às 16:28 +, Lionel Landwerlin escreveu:
Hi Mika,
Even after this series, we're still missing support for reading
the
timestamp frequency (read_timestamp_frequency in
On 09/01/18 23:28, Paulo Zanoni wrote:
The only thing that differs here is that the crystal clock freq now
has four possible values.
This patch gets rid of the "Unknown gen, unable to compute..." message
at boot for gen11.
Reviewed-by: Lionel Landwerlin
Still
Chris Wilson writes:
> Tvrtko uncovered a fun issue with recovering from a wedge device. In his
> tests, he wedged the driver by injecting an unrecoverable hang whilst a
> batch was spinning. As we reset the gpu in the middle of the spinner,
> when resumed it would
Quoting Jackie Li (2018-03-23 01:59:22)
> GuC Address Space and WOPCM Layout diagrams won't be generated correctly by
> sphinx build if not using proper reST syntax.
>
> This patch uses reST literal blocks to make sure GuC Address Space and
> WOPCM Layout diagrams to be generated correctly, and
== Series Details ==
Series: drm/i915: Add debugfs file to clear FIFO underruns.
URL : https://patchwork.freedesktop.org/series/40800/
State : failure
== Summary ==
Series 40800v1 drm/i915: Add debugfs file to clear FIFO underruns.
On Wed, Mar 28, 2018 at 10:29:15AM +0200, Maarten Lankhorst wrote:
> Op 22-03-18 om 23:10 schreef Radhakrishna Sripada:
> > From: Anusha Srivatsa
> >
> > Cleanup the testcases by moving the platform checks to a single function.
> >
> > The earlier version of the path is
On Tue, Mar 27, 2018 at 06:33:11PM +, Pandiyan, Dhinakaran wrote:
> On Tue, 2018-03-27 at 13:24 +0300, Ville Syrjälä wrote:
> > On Mon, Mar 26, 2018 at 06:16:22PM -0700, Dhinakaran Pandiyan wrote:
> > > Interrupts other than the one for AUX errors are required only for debug,
> > > so unmask
On 27/03/2018 22:01, Chris Wilson wrote:
Tvrtko uncovered a fun issue with recovering from a wedge device. In his
tests, he wedged the driver by injecting an unrecoverable hang whilst a
batch was spinning. As we reset the gpu in the middle of the spinner,
when resumed it would continue on from
On Wed, 28 Mar 2018, Maarten Lankhorst
wrote:
> Adding a i915_fifo_underrun_reset debugfs file will make it possible
> for IGT tests to clear FIFO underrun fallout at the start of each
> subtest, and make re-enable FBC so tests always have maximum exposure
> to
== Series Details ==
Series: series starting with [1/3] drm/i915/execlists: Reset ring registers on
rebinding contexts (rev2)
URL : https://patchwork.freedesktop.org/series/40764/
State : failure
== Summary ==
Possible new issues:
Test kms_flip:
Subgroup
Adding a i915_fifo_underrun_reset debugfs file will make it possible
for IGT tests to clear FIFO underrun fallout at the start of each
subtest, and make re-enable FBC so tests always have maximum exposure
to features used by IGT. FIFO underruns and FBC bugs will no longer
hide when an earlier
== Series Details ==
Series: Add NV12 support (rev5)
URL : https://patchwork.freedesktop.org/series/39670/
State : success
== Summary ==
Series 39670v5 Add NV12 support
https://patchwork.freedesktop.org/api/1.0/series/39670/revisions/5/mbox/
Known issues:
Test gem_exec_suspend:
On 28/03/2018 10:39, Tvrtko Ursulin wrote:
On 27/03/2018 23:14, Yunwei Zhang wrote:
L3Bank could be fused off in hardware for debug purpose, and it
is possible that subslice is enabled while its corresponding L3Bank pairs
are disabled. In such case, if MCR packet control register(0xFDC) is
On 27/03/2018 23:14, Yunwei Zhang wrote:
L3Bank could be fused off in hardware for debug purpose, and it
is possible that subslice is enabled while its corresponding L3Bank pairs
are disabled. In such case, if MCR packet control register(0xFDC) is
programed to point to a disabled bank pair, a
Quoting Patchwork (2018-03-28 06:21:58)
> == Series Details ==
>
> Series: series starting with [v5,1/8] drm/i915: Correctly handle error path
> in i915_gem_init_hw
> URL : https://patchwork.freedesktop.org/series/40759/
> State : failure
>
> == Summary ==
>
> Possible new issues:
>
>
== Series Details ==
Series: series starting with [v5,1/2] drm/i915/cnl: Implement
WaProgramMgsrForCorrectSliceSpecificMmioReads (rev5)
URL : https://patchwork.freedesktop.org/series/40503/
State : success
== Summary ==
Known issues:
Test kms_cursor_crc:
Subgroup
On 3/28/2018 2:05 AM, Michal Wajdeczko wrote:
Since commit 6ca9a2beb54a ("drm/i915: Unwind i915_gem_init() failure")
we believed that we correctly handle all errors encountered during
GuC initialization, including special one that indicates request to
run driver with disabled GPU submission
On 3/28/2018 2:05 AM, Michal Wajdeczko wrote:
Today uc_fini_hw is subset of uc_sanitize, but remaining
code in sanitize function is also desired for uc_fini_hw.
Instead of duplicating the code, just call uc_sanitize,
but leave as separate function to maintain symmetry with
uc_init_hw.
From: Mahesh Kumar
Add support of recognizing DRM_FORMAT_NV12 from plane_format
register value.
v2: Added reviewed by tag from Mika Kahola
v3: Added reviewed by from Juha-Pekka Heikkila
v4: Rebased the series
Reviewed-by: Juha-Pekka Heikkila
From: Chandra Konduru
This patch sets appropriate scaler mode for NV12 format.
In this mode, skylake scaler does either chroma-upsampling or
chroma-upsampling and resolution scaling
v2: Review comments from Ville addressed
NV12 case to be checked first for setting
the
From: Chandra Konduru
This patch adds NV12 to list of supported formats for
primary plane
v2: Rebased (Chandra Konduru)
v3: Rebased (me)
v4: Review comments by Ville addressed
Removed the skl_primary_formats_with_nv12 and
added NV12 case in existing
Patch adds checks to primary plane related
to scaling, clipping, rotation and fb formats.
These checks currently, were being done only for sprites.
These are required for primary plane as well.
Credits-to: Maarten Lankhorst
Signed-off-by: Vidya Srinivas
From: Mahesh Kumar
NV12 requires WM calculation for UV plane as well.
UV plane WM should also fulfill all the WM related restrictions.
v2: Addressed review comments from Shashank Sharma.
v3: Addressed review comments from Shashank Sharma
Changed plane_num to plane_id
From: Chandra Konduru
This patch adds NV12 to format_is_yuv() function
for sprite planes.
v2:
-Use intel_ prefix for format_is_yuv (Ville)
v3: Rebased (me)
v4: Rebased and addressed review comments from Clinton A Taylor.
"static function in intel_sprite.c is not
From: Chandra Konduru
This patch updates scaler max limit support for NV12
v2: Rebased (me)
v3: Rebased (me)
v4: Missed the Tested-by/Reviewed-by in the previous series
Adding the same to commit message in this version.
v5: Addressed review comments from Ville and
Display WA 827 applies to GEN9 (excluede GLK) and CNL.
Switching the plane format from NV12 to RGB and leaving system idle
results in display underrun and corruption.
WA: Set the bit 15 & bit 19 to 1b in the CLKGATE_DIS_PSL
register for the pipe in which NV12 plane is enabled.
v2: Addressed
If the fb format is YUV, enable the plane CSC mode bits
for the conversion.
v2: Addressed review comments from Shashank Sharma
Alignment issue fixed in i915_reg.h
v3: Adding Reviewed By from Shashank Sharma
v4: Rebased the patch. As part of rebasing, re-using
the color series defines which are
From: Mahesh Kumar
Current code calculates DDB for planar formats in such a way that we
store DDB of plane-0 in plane 1 & vice-versa.
In order to make this clean this patch refactors WM/DDB calculation for
NV12 planar formats.
v2: Addressed review comments by Maarten
This patch series is adding NV12 support for Broxton display after rebasing on
latest drm-tip.
Initial series of the patches can be found here:
https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html
Previous revision history:
The first version of patches were reviewed when floated
From: Chandra Konduru
This patch adds NV12 to list of supported formats for sprite plane.
v2: Rebased (me)
v3: Review comments by Ville addressed
- Removed skl_plane_formats_with_nv12 and added
NV12 case in existing skl_plane_formats
- Added the 10bpc RGB formats
From: Chandra Konduru
This patch adds NV12 as supported format
to intel_framebuffer_init and performs various checks.
v2:
-Fix an issue in checks added (Chandra Konduru)
v3: rebased (me)
v4: Review comments by Ville addressed
Added platform check for NV12 in
From: Mahesh Kumar
Display Workaround #0826 (SKL:ALL BXT:ALL) & #1059(CNL:A)
Hardware sometimes fails to wake memory from pkg C states fetching the
last few lines of planar YUV 420 (NV12) planes. This causes
intermittent underflow and corruption.
WA: Disable package C
From: Mahesh Kumar
This patch passes skl_wm_level structure itself to watermark
computation function skl_compute_plane_wm function (instead
of its internal parameters). It reduces number of arguments
required to be passed.
v2: Addressed review comments by Shashank
As per WA 1106, to avoid corruption issues
NV12 plane height needs to be multiplier of 4
We avoid trunction in this patch so that
the buffer we send (which is multiplier of 4)
directs goes into the kernel.
Credits-to: Maarten Lankhorst
Signed-off-by: Vidya
From: Mahesh Kumar
DDB allocation optimization algorithm requires/assumes ddb allocation for
any memory C-state level DDB value to be as high as level below the
current level. Render decompression requires level WM to be as high as
wm level-0. This patch fulfils both the
From: Mahesh Kumar
skl_wm_values struct contains values of pipe/plane DDB only.
so rename it for better readability of code. Similarly
skl_copy_wm_for_pipe copies DDB values.
s/skl_wm_values/skl_ddb_values
s/skl_copy_wm_for_pipe/skl_copy_ddb_for_pipe
Changes since V1:
From: Mahesh Kumar
This patch splits skl_compute_wm/ddb functions into two parts.
One adds all affected pipes after the commit to atomic_state structure
and second part does compute the DDB.
v2: Added reviewed by tag from Shashank Sharma
v3: Added reviewed by from
From: Mahesh Kumar
For YUV 420 Planar formats like NV12,
buffer allocation is done for Y and UV surfaces separately.
For NV12 plane formats, the UV buffer
allocation must be programmed in the Plane Buffer Config register
and the Y buffer allocation must be programmed in
On 3/28/2018 2:05 AM, Michal Wajdeczko wrote:
In commit 9192d4fb811e ("drm/i915/guc: Extract doorbell creation
from client allocation") we introduced asymmetry in doorbell cleanup
to avoid warnings due to failed communication with already reset GuC.
As we improved our reset/unload paths, we
On 3/28/2018 2:05 AM, Michal Wajdeczko wrote:
We should not leave GuC submission enabled after sanitize,
as we are going to reset all GuC/HuC hardware.
Signed-off-by: Michal Wajdeczko
Cc: Sagar Arun Kamble
Cc: Chris Wilson
== Series Details ==
Series: series starting with [1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper
URL : https://patchwork.freedesktop.org/series/40768/
State : success
== Summary ==
Known issues:
Test kms_cursor_crc:
Subgroup cursor-128x128-suspend:
dmesg-warn ->
Quoting Chris Wilson (2018-03-27 10:23:26)
> Quoting Tvrtko Ursulin (2018-03-27 09:51:20)
> >
> > On 26/03/2018 12:50, Chris Wilson wrote:
> > > +static enum hrtimer_restart preempt_timeout(struct hrtimer *hrtimer)
> > > +{
> > > + struct intel_engine_execlists *execlists =
> > > +
On 2018.03.27 17:39:53 +0300, Joonas Lahtinen wrote:
> Quoting Joonas Lahtinen (2018-03-27 16:42:28)
> > Quoting Zhenyu Wang (2018-03-27 11:39:42)
> > >
> > > Hi, Joonas
> > >
> > > Here's this week's gvt-next-fixes queued for 4.17. One notable change
> > > is to revert previous workaround for
Quoting Mika Kuoppala (2018-03-28 08:58:38)
> Chris Wilson writes:
>
> > Tvrtko uncovered a fun issue with recovering from a wedge device. In his
> > tests, he wedged the driver by injecting an unrecoverable hang whilst a
> > batch was spinning. As we reset the gpu in
Hi Eric,
Thanks for your input.
On Wed, Mar 21, 2018 at 10:10:00AM -0700, Eric Anholt wrote:
> Maxime Ripard writes:
>
> > [ Unknown signature status ]
> > Hi,
> >
> > On Mon, Mar 05, 2018 at 03:21:26PM +0100, Maxime Ripard wrote:
> >> Here is an RFC at starting to
Op 22-03-18 om 23:10 schreef Radhakrishna Sripada:
> From: Anusha Srivatsa
>
> Cleanup the testcases by moving the platform checks to a single function.
>
> The earlier version of the path is posted here [1]
>
> v2: Make use of the property enums to get the supported
On Thu, 2018-03-22 at 15:10 -0700, Radhakrishna Sripada wrote:
> From: Anusha Srivatsa
>
> Cleanup the testcases by moving the platform checks to a single
> function.
>
> The earlier version of the path is posted here [1]
>
> v2: Make use of the property enums to get
== Series Details ==
Series: drm/i915/guc: Support for Guc responses and requests (rev5)
URL : https://patchwork.freedesktop.org/series/28393/
State : failure
== Summary ==
Possible new issues:
Test debugfs_test:
Subgroup read_all_entries_display_off:
pass
== Series Details ==
Series: drm: Use srcu to protect drm_device.unplugged
URL : https://patchwork.freedesktop.org/series/40793/
State : success
== Summary ==
Series 40793v1 drm: Use srcu to protect drm_device.unplugged
https://patchwork.freedesktop.org/api/1.0/series/40793/revisions/1/mbox/
Quoting Francisco Jerez (2018-03-28 07:38:45)
> This allows cpufreq governors to realize when the system becomes
> non-CPU-bound due to GPU rendering activity, which will cause the
> intel_pstate LP controller to behave more conservatively: CPU energy
> usage will be reduced when there isn't a
Chris Wilson writes:
> Tvrtko uncovered a fun issue with recovering from a wedge device. In his
> tests, he wedged the driver by injecting an unrecoverable hang whilst a
> batch was spinning. As we reset the gpu in the middle of the spinner,
> when resumed it would
== Series Details ==
Series: drm: Use srcu to protect drm_device.unplugged
URL : https://patchwork.freedesktop.org/series/40793/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm: Use srcu to protect drm_device.unplugged
+drivers/gpu/drm/drm_drv.c:336:6: warning: context
From: Noralf Trønnes
Use srcu to protect drm_device.unplugged in a race free manner.
Drivers can use drm_dev_enter()/drm_dev_exit() to protect and mark
sections preventing access to device resources that are not available
after the device is gone.
Suggested-by: Daniel Vetter
On Wed, Mar 28, 2018 at 09:47:40AM +0300, Oleksandr Andrushchenko wrote:
> From: Noralf Trønnes
>
> Use srcu to protect drm_device.unplugged in a race free manner.
> Drivers can use drm_dev_enter()/drm_dev_exit() to protect and mark
> sections preventing access to device
== Series Details ==
Series: drm/i915/execlists: Reset ring registers on rebinding contexts
URL : https://patchwork.freedesktop.org/series/40763/
State : failure
== Summary ==
Possible new issues:
Test kms_flip:
Subgroup flip-vs-blocking-wf-vblank:
pass ->
From: Noralf Trønnes
Use srcu to protect drm_device.unplugged in a race free manner.
Drivers can use drm_dev_enter()/drm_dev_exit() to protect and mark
sections preventing access to device resources that are not available
after the device is gone.
Suggested-by: Daniel Vetter
This reverts commit c4f3f70cacba2fa19545389a12d09b606d2ad1cf. A
future commit will introduce a new update_util implementation, so the
pstate_funcs table entry is going to be useful.
Signed-off-by: Francisco Jerez
---
drivers/cpufreq/intel_pstate.c | 15 +--
1
This is provided at Srinivas' request. The LP controller is disabled
for the moment on server FADT profiles in order to avoid disturbing
the performance behavior of small-core servers. In cases where the
default inferred from the BIOS FADT profile is suboptimal, the LP
controller can be
This provides an IO activity statistic to cpufreq governors
complementary to the IO wait time currently available to them. An IO
utilization estimated from this statistic which is significantly lower
than 100% can be interpreted as an indication that no IO devices are
utilized to their full
This series attempts to solve an energy efficiency problem of the
current active-mode non-HWP governor of the intel_pstate driver used
for the most part on low-power platforms. Under heavy IO load the
current controller tends to increase frequencies to the maximum turbo
P-state, partly due to IO
This allows cpufreq governors to realize when the system becomes
non-CPU-bound due to GPU rendering activity, which will cause the
intel_pstate LP controller to behave more conservatively: CPU energy
usage will be reduced when there isn't a good chance for system
performance to scale with CPU
This reverts one half of commit
d77d4888cb8458b098accd4d7555c0f7f6399c4e. It moves back to the old
name of get_target_pstate_use_cpu_load(), because a future commit will
introduce a new P-state target calculation function. The shortened
name of INTEL_PSTATE_SAMPLING_INTERVAL is left untouched.
This introduces a controller for low-power parts that takes advantage
of the IO active time statistic introduced earlier in order to adjust
the trade-off between responsiveness and energy efficiency of the
heuristic dynamically. This allows it to achieve lower energy
consumption when the system
This reverts commit dbd49b85eec7eb6d7ae61bad8306d5cdd85c142d. A
future commit will introduce a new update_util implementation for LP
platforms, so the bxt_funcs table comes in handy.
Signed-off-by: Francisco Jerez
---
drivers/cpufreq/intel_pstate.c | 13 +++--
1
This is not required for the controller to work but has proven very
useful for debugging and testing of alternative heuristic parameters,
which may offer a better trade-off between energy efficiency and
latency -- The default parameters are rather aggressively
latency-minimizing in order to keep
This reverts commit a891283e56362543d1d276e192266069ef52075b. The
previous approach of taking an explicit P-state target as argument
makes it more easily reusable by a future commit.
Signed-off-by: Francisco Jerez
---
drivers/cpufreq/intel_pstate.c | 12 +++-
1
On Tue, 27 Mar 2018, Chris Wilson wrote:
> Quoting Jani Nikula (2018-03-27 21:47:22)
>> Bool is the more appropriate return type here, use it.
>>
>> Signed-off-by: Jani Nikula
>
> All 3,
> Reviewed-by: Chris Wilson
== Series Details ==
Series: series starting with [1/3] drm: prefer inline over __inline__
URL : https://patchwork.freedesktop.org/series/40760/
State : success
== Summary ==
Known issues:
Test kms_cursor_crc:
Subgroup cursor-128x128-suspend:
dmesg-warn -> PASS
On Tue, 27 Mar 2018, matthew.s.atw...@intel.com wrote:
> From: Matt Atwood
>
> As more differentation occurs between DP spec. Its useful to have these
> as macros in a drm_dp_helper.
>
> Signed-off-by: Matt Atwood
> ---
>
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