[Intel-gfx] [PATCH 28/68] drm/i915: clean up PPGTT init error path

2014-08-21 Thread Ben Widawsky
cific init, now that GEN8 exists. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_gtt.c | 22 +- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 46140e8..151ec39 1

[Intel-gfx] [PATCH 36/68] drm/i915: Generalize GEN6 mapping

2014-08-21 Thread Ben Widawsky
point I will try to combine functionality. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_gtt.c | 61 +++-- drivers/gpu/drm/i915/i915_gem_gtt.h | 2 ++ 2 files changed, 34 insertions(+), 29 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 10/68] drm/i915: Make an uninterruptible evict

2014-08-21 Thread Ben Widawsky
There are no users of this yet, but the idea is presented and split out to find bugs. Also, while here, return -ERESTARTSYS to the caller, in case they want to do something with it. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h| 2 +- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 12/68] drm/i915: Defer PPGTT cleanup

2014-08-21 Thread Ben Widawsky
g it fixes will be superseded by the PPGTT refcounting. However, at this time I do not have a working and tested solution, other than mine. So it's still here. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h | 10 +++ drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH 02/68] drm/i915: Extract l3 remapping out of ctx switch

2014-08-21 Thread Ben Widawsky
This is just a cosmetic change to try to put do_switch_rcs on a diet. As it stands, the function was quite complex, and error prone. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 32 1 file changed, 20 insertions(+), 12 deletions

[Intel-gfx] [PATCH 04/68] drm/i915: Fix another another use-after-free in do_switch

2014-08-21 Thread Ben Widawsky
s a bug in the original patch where the ring->last_context was set too early. I am not sure how this wasn't being hit when I sent this previously. Reviewed-by: Chris Wilson Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 24 +--- 1 file chan

[Intel-gfx] [PATCH 05/68] drm/i915/ctx: Return earlier on failure

2014-08-21 Thread Ben Widawsky
balho Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 0ce8fc9..34bf177 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c

[Intel-gfx] [PATCH 01/68] drm/i915: Split up do_switch

2014-08-21 Thread Ben Widawsky
urate. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 76 + 1 file changed, 49 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 3b99390..16aebc6 100644 --- a/dr

[Intel-gfx] [PATCH 11/68] drm/i915: More correct (slower) ppgtt cleanup

2014-08-21 Thread Ben Widawsky
d deprecate the need for the yet unmerged patch from Chris (and an identical patch from me, which was first!!): drm/i915: Prevent signals from interrupting close() I have a followup patch to implement deferred free, before you complain. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem

[Intel-gfx] [PATCH 08/68] drm/i915/error: Capture vmas instead of BOs

2014-08-21 Thread Ben Widawsky
whatever we chose later. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gpu_error.c | 53 +++ 2 files changed, 30 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm

[Intel-gfx] [PATCH 09/68] drm/i915: Add some extra guards in evict_vm

2014-08-21 Thread Ben Widawsky
Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_evict.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c index bbf4b12..38297d3 100644 --- a/drivers/gpu/drm/i915/i915_gem_evict.c

[Intel-gfx] [PATCH 07/68] drm/i915/error: Do a better job of disambiguating VMAs

2014-08-21 Thread Ben Widawsky
, and know all the VMAs we want to capture are valid. I could have probably figured out a way to reuse mm_list. As we've had bugs here before in the shrinker, I think the best way forward is to get it working, and then optimize it later. Signed-off-by: Ben Widawsky --- drivers/gpu/drm

[Intel-gfx] [PATCH 06/68] drm/i915/error: vma error capture prettyify

2014-08-21 Thread Ben Widawsky
Rename some variables, and clean up the code a bit to make things clearer in our error capture. There isn't an intentional functional change here. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gpu_error.c | 55 --- 1 file changed, 32 inser

[Intel-gfx] [PATCH 03/68] drm/i915/ppgtt: Load address space after mi_set_context

2014-08-21 Thread Ben Widawsky
sync with the docs. v2: Completely rewritten commit message that addresses the requests Ville made for v1 Only load PDPs for initial context load (Ville) Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 29 +++-- 1 file changed, 27 insertions(+), 2 deletio

[Intel-gfx] [PATCH 00/68] Broadwell 48b addressing and prelocations (no relocs)

2014-08-21 Thread Ben Widawsky
[4] This was the best I could do on short notice. I won't be improving, rebasing, or fixing these patches any longer, but someone is welcome to take them over. Consider this my parting gift before I go on sabbatical [tomorrow]. -- Ben Widawsky (68): drm/i915: Split up do_switch drm/i91

[Intel-gfx] [PATCH] [v2] drm/i915: Fix another another use-after-free in do_switch

2014-08-09 Thread Ben Widawsky
s a bug in the original patch where the ring->last_context was set too early. I am not sure how this wasn't being hit when I sent this previously. Perhaps I tested the wrong patch previously. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 24 +-

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Fix obj->map_and_fenceable for ppgtt

2014-08-09 Thread Ben Widawsky
eason. I think the first two sentences were perfectly succinct in describing the problem. > > v2: Revamp and resend to ease future patches. > > Signed-off-by: Chris Wilson > Cc: Ben Widawsky > Cc: Daniel Vetter I didn't read the patch closely, but the problem i

Re: [Intel-gfx] [PATCH] drm/i915: Update gen8_ppgtt_info to keep working in full ppgtt

2014-08-08 Thread Ben Widawsky
t) > > return; > > > > -- > > 2.0.3 > > > > -- > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ben Widawsky, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 3/7] drm/i915/bdw: MI_FLUSH_DW a qword instead of dword

2014-08-04 Thread Ben Widawsky
On Mon, Aug 04, 2014 at 11:15:15AM -0700, Rodrigo Vivi wrote: > From: Ben Widawsky > > The actual post sync op is "Write Immediate Data QWord." It is therefore > arguable that we should have always done a qword write. > > The actual impetus for this patch is our dec

Re: [Intel-gfx] [PATCH 1/7] drm/i915/bdw: Always issue a force restore

2014-08-04 Thread Ben Widawsky
On Mon, Aug 04, 2014 at 11:15:13AM -0700, Rodrigo Vivi wrote: > From: Ben Widawsky > > The PDPs seem to get screwed up otherwise, specifically PDP0. I am not > really clear why this is required, it just works with full PPGTT. > > v2: Only do it for gen8, to limit regression

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Introduce FBC False Color for debug purposes.

2014-07-30 Thread Ben Widawsky
ec bit is > MBZ before IVB. > > Cc: Ville Syrjälä > Cc: Ben Widawsky > Cc: Daniel Vetter > Signed-off-by: Rodrigo Vivi I don't quite understand the motivation for a get() other than debugging the interface itself (if your set is broken). If anything, get should read b

Re: [Intel-gfx] [PATCH] drm/i915: Skip Stolen Memory first page.

2014-07-30 Thread Ben Widawsky
gtt.stolen_size -= ... Or else we don't have the correct assertion in i915_pages_create_for_stolen(). I didn't look carefully if it's safe to currently do it, but it does seem wrong to me as it is. With the first fix (I didn't verify that's the real workaround name)

Re: [Intel-gfx] [PATCH 5/7] drm/i915: Initialize the aliasing ppgtt as part of global gtt

2014-07-30 Thread Ben Widawsky
On Wed, Jul 30, 2014 at 08:47:03PM -0700, Ben Widawsky wrote: > On Wed, Jul 30, 2014 at 08:46:11PM -0700, Ben Widawsky wrote: > > <1386367941-7131-76-git-send-email-benjamin.widaw...@intel.com> > > and > > <1386367941-7131-81-git-send-email-benjamin.widaw...@intel.

Re: [Intel-gfx] [PATCH 5/7] drm/i915: Initialize the aliasing ppgtt as part of global gtt

2014-07-30 Thread Ben Widawsky
On Wed, Jul 30, 2014 at 08:46:11PM -0700, Ben Widawsky wrote: > <1386367941-7131-76-git-send-email-benjamin.widaw...@intel.com> and <1386367941-7131-81-git-send-email-benjamin.widaw...@intel.com> > > On Wed, Jul 30, 2014 at 09:42:02PM +0200, Daniel Vetter wrote: >

Re: [Intel-gfx] [PATCH 5/7] drm/i915: Initialize the aliasing ppgtt as part of global gtt

2014-07-30 Thread Ben Widawsky
5_hw_ppgtt *ppgtt; > + > + ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL); > + if (!ppgtt) > + return -ENOMEM; > + > + ret = __hw_ppgtt_init(dev, ppgtt); > + if (!ret) > + return ret; > + &

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Embellish wait_end trace

2014-07-29 Thread Ben Widawsky
On Wed, Jul 30, 2014 at 07:19:26AM +0100, Chris Wilson wrote: > On Tue, Jul 29, 2014 at 01:14:30PM -0700, Ben Widawsky wrote: > > This adds two new data points to the trace event, wait time, and whether > > or not the event slept. Both of these should already be obtainable >

Re: [Intel-gfx] [PATCH 1/2] drm/i915: timespec_sub should already be normalized

2014-07-29 Thread Ben Widawsky
On Wed, Jul 30, 2014 at 07:15:05AM +0100, Chris Wilson wrote: > On Tue, Jul 29, 2014 at 01:14:29PM -0700, Ben Widawsky wrote: > > So don't bother checking it again. > > This was introduced: > > commit b361237bcc7cea1d99f770490120d8bc2aed > > Author: Chris Wils

[Intel-gfx] [PATCH 1/2] drm/i915: timespec_sub should already be normalized

2014-07-29 Thread Ben Widawsky
So don't bother checking it again. This was introduced: commit b361237bcc7cea1d99f770490120d8bc2aed Author: Chris Wilson Date: Fri Aug 24 09:35:08 2012 +0100 drm/i915: Juggle code order to ease flow of the next patch Cc: Chris Wilson Signed-off-by: Ben Widawsky --- drivers/gp

[Intel-gfx] [PATCH 2/2] drm/i915: Embellish wait_end trace

2014-07-29 Thread Ben Widawsky
(several conditions exist where it won't sleep). Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c | 12 +++- drivers/gpu/drm/i915/i915_trace.h | 29 ++--- 2 files changed, 33 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/i91

Re: [Intel-gfx] [PATCH] drm/i915: vma/ppgtt lifetime rules

2014-07-29 Thread Ben Widawsky
On Tue, Jul 29, 2014 at 11:32:07AM -0700, Ben Widawsky wrote: > On Tue, Jul 29, 2014 at 11:08:05AM +0100, Michel Thierry wrote: > > VMAs should take a reference of the address space they use. > > > > Now, when the fd is closed, it will release the ref that the context was >

Re: [Intel-gfx] [PATCH] drm/i915: vma/ppgtt lifetime rules

2014-07-29 Thread Ben Widawsky
I'd make sure to thoroughly test the various reset/hang conditions. Also, this puts a hard limit on the maximum number of VMAs in an address space based on sizeof(atomic_t). (unless you do what I said above) I doubt it's a problem in the near future, but it should be documented somewhere and I hope kref will explode loudly if you overflow it. For future safety, I'd recommend dropping vm->ctx at this point. It shouldn't be hard at all to get rid of (quick grep shows only debugfs). -- Ben Widawsky, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH] drm/i915: Rework GPU reset sequence to match driver load & thaw

2014-07-28 Thread Ben Widawsky
h patch on top of what Michel sent you, everything passes? > > Thanks, > Alistair. > > -Original Message- > From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter > Sent: Monday, July 28, 2014 10:27 AM > To: Ben Widawsky > Cc: Mcaulay, Alistair;

Re: [Intel-gfx] [PATCH] mutex: Export an interface to wrap a mutex lock

2014-07-28 Thread Ben Widawsky
ep and > lockstat cannot discriminate the true callers of mutex_lock(). Unless we > provide a means for the wrapper to pass that information down. > > It also appears that i915 is unique in this manner of wrapping > mutex_lock(). > > Signed-off-by: Chris Wilson > Cc: Ben Wi

Re: [Intel-gfx] [PATCH] drm/i915: Rework GPU reset sequence to match driver load & thaw

2014-07-25 Thread Ben Widawsky
> > int (*enable)(struct i915_hw_ppgtt *ppgtt); > int (*switch_mm)(struct i915_hw_ppgtt *ppgtt, > - struct intel_engine_cs *ring, > - bool synchronous); > + struct intel_engine_cs *ring); > void (*debug_dump)(struct i915_hw_ppgtt

Re: [Intel-gfx] [PATCH] drm/i915/chv: Use timeout mode for RC6 on chv

2014-07-21 Thread Ben Widawsky
6_mode = GEN6_RC_CTL_EI_MODE(1); > >+rc6_mode = GEN7_RC_CTL_TO_MODE; > > I915_WRITE(GEN6_RC_CONTROL, rc6_mode); > > Hi Ben, > > Please review the patch Why me? I don't know anything about Cherryview. I only put the r-b on the B

Re: [Intel-gfx] [PATCH 08/16] drm/i915/error: Do a better job of disambiguating VMAs

2014-07-20 Thread Ben Widawsky
On Thu, Jul 17, 2014 at 10:51:23AM +0200, Daniel Vetter wrote: > On Fri, Jul 04, 2014 at 09:56:54AM -0700, Ben Widawsky wrote: > > On Fri, Jul 04, 2014 at 08:57:08AM +0100, Chris Wilson wrote: > > > On Tue, Jul 01, 2014 at 11:17:43AM -0700, Ben Widawsky wrote: > > > &

Re: [Intel-gfx] [PATCH] drm/i915: Do not access stolen memory directly by the CPU, even for error capture

2014-07-20 Thread Ben Widawsky
On Sun, Jul 20, 2014 at 09:29:55AM +0100, Chris Wilson wrote: > On Tue, Jul 15, 2014 at 08:30:33PM -0700, Ben Widawsky wrote: > > On Tue, Jul 15, 2014 at 04:15:08PM +0200, Daniel Vetter wrote: > > > On Thu, Apr 24, 2014 at 02:47:48PM -0700, Ben Widawsky wrote: > > > >

Re: [Intel-gfx] [PATCH] drm/i915: Fix possible overflow when recording semaphore states.

2014-07-18 Thread Ben Widawsky
Skip when from == to (Damien). > v3: avoid computing idx when from == to (Damien). > use ring == to instead of ring->id == to->id (Damien). > use continue instead of return (Rodrigo). > v4: avoid all unecessary computation (Damien). > reduce idx to loop scope (Damie

Re: [Intel-gfx] [PATCH] drm/i915: Fix printing proper min/min/rpe values in debugfs

2014-07-17 Thread Ben Widawsky
Oops, meant to reply-to-all On Thu, Jul 17, 2014 at 07:44:25PM -0700, Ben Widawsky wrote: > On Thu, Jul 17, 2014 at 10:42:20AM +0200, Daniel Vetter wrote: > > On Thu, Jul 17, 2014 at 02:21:14PM +0530, deepa...@linux.intel.com wrote: > > > From: Deepak S > > > &

Re: [Intel-gfx] [PATCH] drm/i915: print full error ring semaphore mboxes and sync.

2014-07-17 Thread Ben Widawsky
On Thu, Jul 17, 2014 at 10:58:17AM -0700, Rodrigo Vivi wrote: > With the increasing number of rings, > we probably have more information to print than we were printing. > > v2: Loop only over active rings and print info with ring names. > > Cc: Ben Widawsky > Signed

Re: [Intel-gfx] [PATCH] drm/i915: print full error ring semaphore mboxes and sync.

2014-07-17 Thread Ben Widawsky
014 at 09:39:55AM -0700, Rodrigo Vivi wrote: > > With the increasing number of rings, > > we probably have more information to print than we were printing. > > After our discussion were you going to send a new patch? > > [snip] > > >

Re: [Intel-gfx] [PATCH] drm/i915: print full error ring semaphore mboxes and sync.

2014-07-17 Thread Ben Widawsky
On Thu, Jul 17, 2014 at 09:39:55AM -0700, Rodrigo Vivi wrote: > With the increasing number of rings, > we probably have more information to print than we were printing. After our discussion were you going to send a new patch? [snip] -- Ben Widawsky, Intel Open Source Technology

Re: [Intel-gfx] [PATCH] drm/i915: Do not unmap object unless no other VMAs reference it

2014-07-17 Thread Ben Widawsky
On Thu, Jul 17, 2014 at 04:45:02PM -0700, Ben Widawsky wrote: > On Fri, Jul 11, 2014 at 10:20:07AM -0700, armin.c.re...@intel.com wrote: > > From: Armin Reese > > > > Signed-off-by: Armin Reese > > --- > > drivers/gpu/drm/i915/i915_gem.c | 6 +++--- > &

Re: [Intel-gfx] [PATCH] drm/i915: Do not unmap object unless no other VMAs reference it

2014-07-17 Thread Ben Widawsky
ot; As a side note: I was expecting this to be fixed as part of Daniels "lifetime tracking" plans. I had imagined that would have a handler run when refcount hits 0 that can do the dma_unmap. Therefore I assume everything in that list_empty() condition is a temporary hack. This patch i

Re: [Intel-gfx] [PATCH] drm/i915: Optimize the i915_gem_gtt_finish_object function

2014-07-17 Thread Ben Widawsky
dma_unmap_sg(&dev->pdev->dev, >obj->pages->sgl, obj->pages->nents, >PCI_DMA_BIDIRECTIONAL); > > - undo_idling(dev_priv, interruptible); > + undo_idling(dev_priv, interruptible); > + } > } > >

Re: [Intel-gfx] [PATCH] drm/i915: Fix possible overflow when recording semaphore states.

2014-07-17 Thread Ben Widawsky
gt; * rcs -> 0 = vcs, 1 = bcs, 2 = vecs, 3 = vcs2; > * vcs -> 0 = bcs, 1 = vecs, 2 = vcs2, 3 = rcs; > * bcs -> 0 = vecs, 1 = vcs2. 2 = rcs, 3 = vcs; > * vecs -> 0 = vcs2, 1 = rcs, 2 = vcs, 3 = bcs; > * vcs2 -> 0 = rcs, 1 = vcs, 2 = bcs, 3 = vecs; > */ &

Re: [Intel-gfx] [PATCH 11/11] drm/i915/bdw: Map unused PDPs to a scratch page

2014-07-16 Thread Ben Widawsky
On Mon, 14 Jul 2014 05:18:44 -0700 Rodrigo Vivi wrote: > From: Bob Beckett > > Create a scratch page for the two unused PDPs and set all the PTEs > for them to point to it. > > This patch addresses a page fault, and subsequent hang in pipe > control flush. In these cases, the Main Graphic Arbi

Re: [Intel-gfx] [PATCH] drm/i915: Do not access stolen memory directly by the CPU, even for error capture

2014-07-15 Thread Ben Widawsky
On Tue, Jul 15, 2014 at 04:15:08PM +0200, Daniel Vetter wrote: > On Thu, Apr 24, 2014 at 02:47:48PM -0700, Ben Widawsky wrote: > > On Wed, Feb 12, 2014 at 07:18:40PM +, Chris Wilson wrote: > > > For stolen pages, since it is verboten to access them directly on many > >

Re: [Intel-gfx] [PATCH 07/10] drm/i915/bdw: collect semaphore error state

2014-07-14 Thread Ben Widawsky
loops around all the rings, but semaphore_mboxes[] and > semaphore_seqno[] are of size (I915_NUM_RINGS - 1). > > -- > Damien Dan Carpenter has already reported this to us. I was expecting a patch from Rodrigo. -- Ben Widawsky, Intel Open Source Technology Center _

Re: [Intel-gfx] [PATCH] drm/i915: get/put runtime PM at i915_semaphore_status

2014-07-09 Thread Ben Widawsky
27;t follow any of the PM mails, so feel free to ignore if this has been discussed and addressed already. > > Testcase: igt/pm_rpm/debugfs-read > Cc: Ben Widawsky > Signed-off-by: Paulo Zanoni Reviewed-by: Ben Widawsky > --- > drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ &

Re: [Intel-gfx] [PATCH 08/16] drm/i915/error: Do a better job of disambiguating VMAs

2014-07-04 Thread Ben Widawsky
On Fri, Jul 04, 2014 at 08:57:08AM +0100, Chris Wilson wrote: > On Tue, Jul 01, 2014 at 11:17:43AM -0700, Ben Widawsky wrote: > > Some of the original PPGTT patches in this area where unmerged, and this > > left a lot of confusion in our error capture with regard to which vm/obj

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gen8: Invalidate TLBs before PDP reload

2014-07-04 Thread Ben Widawsky
On Fri, Jul 04, 2014 at 08:51:59AM +0100, Chris Wilson wrote: > On Thu, Jul 03, 2014 at 03:01:49PM -0700, Ben Widawsky wrote: > > This is a spec requirement for all rings. > > > > Signed-off-by: Ben Widawsky > > --- > > drivers/gpu/drm/i915/i915_gem_context

[Intel-gfx] [PATCH 1/2] drm/i915/gen8: Invalidate TLBs before PDP reload

2014-07-03 Thread Ben Widawsky
This is a spec requirement for all rings. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 5b4a9a0..1ac648f 100644 --- a/drivers

[Intel-gfx] [PATCH 2/2] drm/i915: Remove false assertion in ppgtt_release

2014-07-03 Thread Ben Widawsky
taking off the active list because of the missing retire seqno for a VMA. Like some of the other fixes I've submitted recently, this should be fixed by the eventual work Daniel will do. This is pretty easy to reproduce whenever mesa uses the blit engine. Signed-off-by: Ben Widawsky ---

Re: [Intel-gfx] [PATCH 09/10] drm/i915/bdw: Always issue a force restore

2014-07-03 Thread Ben Widawsky
On Thu, Jul 03, 2014 at 05:33:05PM -0400, Rodrigo Vivi wrote: > From: Ben Widawsky > > The PDPs seem to get screwed up otherwise, specifically PDP0. I am not > really clear why this is required, it just works with full PPGTT. > > v2: Only do it for gen8, to limit regression

Re: [Intel-gfx] pin OABUFFER to GGTT

2014-07-03 Thread Ben Widawsky
On Thu, Jul 03, 2014 at 10:10:48AM -0700, Ben Widawsky wrote: > On Thu, Jul 03, 2014 at 08:17:32AM +0100, Damien Lespiau wrote: > > On Wed, Jul 02, 2014 at 02:19:42PM +0100, Rutkowski, Adam J wrote: > > > Having said all this, how about restoring the pin_ioctl? At least for >

Re: [Intel-gfx] pin OABUFFER to GGTT

2014-07-03 Thread Ben Widawsky
BO is still referenced within a batch, we need the flag to tell us it needs global binding. FWIW, I remain in favor of the relocation idea unless someone already expressed why we need multiple processes to have the relocation info. -- Ben Widawsky, Intel Open Source Technology Center

Re: [Intel-gfx] pin OABUFFER to GGTT

2014-07-02 Thread Ben Widawsky
cable - queries might be done per each > Draw. There isn't any secret or privacy in that OA buffer data - just > results of performance counters, shown by tools such as GPA/ Vtune. > > Thanks, > Tomasz > > > > > > > -Original Mes

Re: [Intel-gfx] pin OABUFFER to GGTT

2014-07-01 Thread Ben Widawsky
s in the GGTT? I'd also argue that they need to be able to map it (they need the contents, which may or may not be mapped). However, I think this is a very minor point. With the command validator this should be a pretty reasonable thing to accomplish. I think we can just give a flag for the

[Intel-gfx] [PATCH 07/16] drm/i915/error: vma error capture prettyify

2014-07-01 Thread Ben Widawsky
Rename some variables, and clean up the code a bit to make things clearer in our error capture. There isn't an intentional functional change here. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gpu_error.c | 55 --- 1 file changed, 32 inser

[Intel-gfx] [PATCH 14/16] drm/i915: Defer PPGTT cleanup

2014-07-01 Thread Ben Widawsky
not spent much time investigating any corner cases, in particular, cases where I need to cleanup the wq. If this patch does head in the merge direction, I will take a closer look at that. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h | 10 +++ drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH 15/16] drm/i915/bdw: Enable full PPGTT

2014-07-01 Thread Ben Widawsky
Broadwell is perfectly capable of full PPGTT. I've been using it for some time, and seen no especially ill effects. Signed-off-by: Ben Widawsky Conflicts: drivers/gpu/drm/i915/i915_drv.h --- drivers/gpu/drm/i915/i915_drv.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[Intel-gfx] [PATCH 08/16] drm/i915/error: Do a better job of disambiguating VMAs

2014-07-01 Thread Ben Widawsky
, and know all the VMAs we want to capture are valid. I could have probably figured out a way to reuse mm_list. As we've had bugs here before in the shrinker, I think the best way forward is to get it working, and then optimize it later. Signed-off-by: Ben Widawsky --- drivers/gpu/drm

[Intel-gfx] [PATCH 13/16] drm/i915: More correct (slower) ppgtt cleanup

2014-07-01 Thread Ben Widawsky
d deprecate the need for the yet unmerged patch from Chris (and an identical patch from me, which was first!!): drm/i915: Prevent signals from interrupting close() I have a followup patch to implement deferred free, before you complain. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem

[Intel-gfx] [PATCH 16/16] drm/i915: Get the error state over the wire (HACKish)

2014-07-01 Thread Ben Widawsky
nt to keep reset enabled but still get error state. Since I found the patch pretty useful, I decided to clean it up and submit it. It was mostly meant as a one-off hack originally though. If a maintainer decides it's useful, then here it is. Signed-off-by: Ben Widawsky --- drivers/gp

[Intel-gfx] [PATCH 11/16] drm/i915: Make an uninterruptible evict

2014-07-01 Thread Ben Widawsky
There are no users of this yet, but the idea is presented and split out to find bugs. Also, while here, return -ERESTARTSYS to the caller, in case they want to do something with it. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h| 2 +- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 12/16] drm/i915: Reorder ctx unref on ppgtt cleanup

2014-07-01 Thread Ben Widawsky
this order makes debugging a bit easier if we're tracking object lifetimes for the context vs ppgtt Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/

[Intel-gfx] [PATCH 09/16] drm/i915/error: Capture vmas instead of BOs

2014-07-01 Thread Ben Widawsky
whatever we chose later. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gpu_error.c | 53 +++ 2 files changed, 30 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm

[Intel-gfx] [PATCH 03/16] drm/i915/ppgtt: Load address space after mi_set_context

2014-07-01 Thread Ben Widawsky
sync with the docs. v2: Completely rewritten commit message that addresses the requests Ville made for v1 Only load PDPs for initial context load (Ville) Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 29 +++-- 1 file changed, 27 insertions(+), 2 deletio

[Intel-gfx] [PATCH 10/16] drm/i915: Add some extra guards in evict_vm

2014-07-01 Thread Ben Widawsky
Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_evict.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c index bbf4b12..38297d3 100644 --- a/drivers/gpu/drm/i915/i915_gem_evict.c

[Intel-gfx] [PATCH 05/16] drm/i915/ctx: Return earlier on failure

2014-07-01 Thread Ben Widawsky
balho Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 0e6e743..cf7cf81 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c

[Intel-gfx] [PATCH 01/16] drm/i915: Split up do_switch

2014-07-01 Thread Ben Widawsky
urate. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 78 + 1 file changed, 50 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 0d2c75b..6dbe3e7 100644 --- a/dr

[Intel-gfx] [PATCH 02/16] drm/i915: Extract l3 remapping out of ctx switch

2014-07-01 Thread Ben Widawsky
This is just a cosmetic change to try to put do_switch_rcs on a diet. As it stands, the function was quite complex, and error prone. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 32 1 file changed, 20 insertions(+), 12 deletions

[Intel-gfx] [PATCH 00/16] Enabling GEN8 full PPGTT + fixes

2014-07-01 Thread Ben Widawsky
! sleep 3 kill ${pid[*]} done Ben Widawsky (16): drm/i915: Split up do_switch drm/i915: Extract l3 remapping out of ctx switch drm/i915/ppgtt: Load address space after mi_set_context drm/i915: Fix another another use-after-free in do_switch drm/i915/ctx: Return earlier on f

[Intel-gfx] [PATCH 04/16] drm/i915: Fix another another use-after-free in do_switch

2014-07-01 Thread Ben Widawsky
i915_gpu_idle switch_to_default from changes to default context This could be backported to the pre do_switch cleanup I did in this series. However, it's much cleaner and more obvious as a patch on top, so I'd really like to do this as a post cleanup patch. Signed-o

[Intel-gfx] [PATCH 06/16] drm/i915/error: Check the potential ctx obj's vm

2014-07-01 Thread Ben Widawsky
fix up the error state). Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gpu_error.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 66cf417..550ba38 100644 --- a/drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Reserve space for FBC (fbcon)

2014-06-30 Thread Ben Widawsky
On Thu, Jun 19, 2014 at 08:28:11PM +0100, Chris Wilson wrote: > On Thu, Jun 19, 2014 at 12:06:13PM -0700, Ben Widawsky wrote: > > This is one part in a few fixes needed to make FBC work with limited > > stolen memory and large resolution displays. It is not the full > > so

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Introduce dual_bsd_ring parameter.

2014-06-30 Thread Ben Widawsky
_param_named(dual_bsd_ring, i915.dual_bsd_ring, int, 0600); > +MODULE_PARM_DESC(dual_bsd_ring, > + "Specify bds rings for VCS when there are multiple VCSs available." > + "(0=All available bsd rings [default], 1=only VCS1, 2=only VCS2)"); > + It looks lik

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Updating comments.

2014-06-30 Thread Ben Widawsky
-> 0 = vecs, 1 = vcs2. 2 = rcs, 3 = vcs; > + * vecs -> 0 = vcs2, 1 = rcs, 2 = vcs, 3 = bcs; > + * vcs2 -> 0 = rcs, 1 = vcs, 2 = bcs, 3 = vecs; >*/ I'd be a favor of dropping this table, and instead explaining the goal of the math (to save the dword) >

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Fix VCS2's ring name.

2014-06-30 Thread Ben Widawsky
On Mon, Jun 30, 2014 at 09:51:09AM -0700, Rodrigo Vivi wrote: > It just fix a typo. > > Signed-off-by: Rodrigo Vivi Reviewed-by: Ben Widawsky [snip] -- Ben Widawsky, Intel Open Source Technology Center ___ Intel-gfx mailing list

Re: [Intel-gfx] [PATCH 10/10] drm/i915: Enable semaphores on BDW

2014-06-30 Thread Ben Widawsky
On Mon, Jun 30, 2014 at 09:53:44AM -0700, Rodrigo Vivi wrote: > Signed-off-by: Rodrigo Vivi Reviewed-by: Ben Widawsky -- Ben Widawsky, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org h

Re: [Intel-gfx] [PATCH 05/10] drm/i915: Implement MI decode for gen8

2014-06-30 Thread Ben Widawsky
On Mon, Jun 30, 2014 at 09:53:39AM -0700, Rodrigo Vivi wrote: > Ipehr just carries Dword 0 and on Gen 8, offsets are located > on Dword 2 and 3 of MI_SEMAPHORE_WAIT. > > This implementation was based on Ben's work and on Ville's suggestion for Ben > > Cc: Ville

Re: [Intel-gfx] [PATCH] drm/i915: Fix some NUM_RING iterators

2014-06-28 Thread Ben Widawsky
On Sat, Jun 28, 2014 at 08:28:55PM +0100, Chris Wilson wrote: > On Sat, Jun 28, 2014 at 08:26:15AM -0700, Ben Widawsky wrote: > > On Sat, Jun 28, 2014 at 07:20:38AM +0100, Chris Wilson wrote: > > > > diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c > > >

Re: [Intel-gfx] [PATCH] drm/i915: Fix some NUM_RING iterators

2014-06-28 Thread Ben Widawsky
On Sat, Jun 28, 2014 at 07:20:38AM +0100, Chris Wilson wrote: > On Fri, Jun 27, 2014 at 03:21:20PM -0700, Rodrigo Vivi wrote: > >Reviewed-by: Rodrigo Vivi <[1]rodrigo.v...@intel.com> > > > >On Fri, Jun 27, 2014 at 3:09 PM, Ben Widawsky > ><[

Re: [Intel-gfx] [PATCH] drm/i915: Fix some NUM_RING iterators

2014-06-27 Thread Ben Widawsky
On Fri, Jun 27, 2014 at 03:21:20PM -0700, Rodrigo Vivi wrote: > Reviewed-by: Rodrigo Vivi > I have a couple of spots that I think are important to add, all in error state. I'll repost v2 after I can actually test it. [snip] -- Ben Widawsky, Intel Open Source Techno

[Intel-gfx] [PATCH] drm/i915: Fix some NUM_RING iterators

2014-06-27 Thread Ben Widawsky
le on this, except I think all the issues have been around for multiple releases without bug reports. Compile tested only for now. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 6 +++--- drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- drivers/gpu/drm/i915/intel_ringbu

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Don't BUG_ON in i915_gem_obj_offset

2014-06-24 Thread Ben Widawsky
On Wed, Jun 25, 2014 at 12:00:35PM +1000, Dave Airlie wrote: > On 25 June 2014 11:30, Ben Widawsky wrote: > > On Wed, Jun 18, 2014 at 12:04:46AM +0200, Daniel Vetter wrote: > >> On Tue, Jun 17, 2014 at 10:34:38PM +0200, Daniel Vetter wrote: > >> > A WARN_ON is per

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Don't BUG_ON in i915_gem_obj_offset

2014-06-24 Thread Ben Widawsky
ea. How about we root cause bugs instead of making blanket statements about the validity of real assertions? If the callers of ggtt_offset are calling it on unbound objects, it's a violation of the design. And in the other cases, it's a real bug. I'd NAK

[Intel-gfx] [PATCH 1/6] drm/i915: Prevent signals from interrupting close()

2014-06-23 Thread Ben Widawsky
vma and contexts under full-ppgtt, but this is useful piece of defensive programming enforcing our userspace API contract. Signed-off-by: Chris Wilson Reviewed-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_dma.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 4/6] drm/i915: Extract l3 remapping out of ctx switch

2014-06-23 Thread Ben Widawsky
This is just a cosmetic change to try to put do_switch_rcs on a diet. As it stands, the function was quite complex, and error prone. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 32 1 file changed, 20 insertions(+), 12 deletions

[Intel-gfx] [PATCH 5/6] drm/i915/ppgtt: Load address space after mi_set_context

2014-06-23 Thread Ben Widawsky
sync with the docs. v2: Completely rewritten commit message that addresses the requests Ville made for v1 Only load PDPs for initial context load (Ville) Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 29 +++-- 1 file changed, 27 insertions(+), 2 deletio

[Intel-gfx] [PATCH 2/6] drm/i915: Only mark the ctx as initialised after a SET_CONTEXT operation

2014-06-23 Thread Ben Widawsky
a SET_CONTEXT operation. Signed-off-by: Chris Wilson Reviewed-by: Ben Widawsky Cc: Ville Syrjälä Cc: Damien Lespiau Cc: Mika Kuoppala --- drivers/gpu/drm/i915/i915_gem_context.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 3/6] drm/i915: Split up do_switch

2014-06-23 Thread Ben Widawsky
x27;t find extracting the full PPGTT usage to be very beneficial at this point, but it may be in the future. This was originally recommended by Daniel Vetter, and in this case, I agree. There was no intentional behavioral change. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_cont

[Intel-gfx] [PATCH 6/6] drm/i915/bdw: Enable full PPGTT

2014-06-23 Thread Ben Widawsky
Broadwell is perfectly capable of full PPGTT. I've been using it for some time, and seen no especially ill effects. Signed-off-by: Ben Widawsky Conflicts: drivers/gpu/drm/i915/i915_drv.h --- drivers/gpu/drm/i915/i915_drv.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

Re: [Intel-gfx] [PATCH 26/53] drm/i915/bdw: New logical ring submission mechanism

2014-06-23 Thread Ben Widawsky
ence in this conversation, but perhaps I missed some detail. So at least from what I can tell, the data structures are right. The problem is that we're mixing and matching intel_engine_cs with the new [and I wish we could have used a different name] intel_ringbuffer. As

Re: [Intel-gfx] [PATCH] drm/i915: Only mark the ctx as initialised after a SET_CONTEXT operation

2014-06-23 Thread Ben Widawsky
t; > drm/i915: Add null state batch to active list > > > > undid the earlier fix of only marking the ctx as initialised after it is > > saved by the hardware during a SET_CONTEXT operation. > > > > Signed-off-by: Chris Wilson > > Cc: Ville Syrjälä > >

Re: [Intel-gfx] [PATCH 3/4] drm/i915: Try harder to get FBC

2014-06-20 Thread Ben Widawsky
break; > + } > > I Am Not A Coder, but at a glance it looks like the ++ could lead to > undefined case 3 when you want case 4. > Thanks for your feedback. 3 is an invalid value, but a default case should be added here. I'd do a BUG_ON, but that's strictly f

Re: [Intel-gfx] [PATCH] drm/i915/bdw: Use timeout mode for RC6 on bdw

2014-06-20 Thread Ben Widawsky
e: VIZ-3778 > Change-Id: I62bb12e21caf19651034826b45cde7f73a80938d > Signed-off-by: Tom O'Rourke Now that CHV is out, does it apply there too? Reviewed-by: Ben Widawsky [snip] -- Ben Widawsky, Intel Open Source Technology Center ___ Intel-gfx mailing list In

Re: [Intel-gfx] intel_gpu_top missing clocks

2014-06-19 Thread Ben Widawsky
;Chris > > ___ > Intel-gfx mailing list > [5]Intel-gfx@lists.freedesktop.org > [6]http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > References > >1. mailto:cphe...

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Reserve space for FBC (fbcon)

2014-06-19 Thread Ben Widawsky
On Thu, Jun 19, 2014 at 08:28:11PM +0100, Chris Wilson wrote: > On Thu, Jun 19, 2014 at 12:06:13PM -0700, Ben Widawsky wrote: > > This is one part in a few fixes needed to make FBC work with limited > > stolen memory and large resolution displays. It is not the full > > so

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