[Intel-gfx] [PATCH 1/7] drm/i915/pmu: Fix enable count array size and bounds checking

2018-06-06 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Enable count array is supposed to have one counter for each possible engine sampler. As such array sizing and bounds checking is not correct when more engine samplers are added. At the same time tidy the assert for readability and robustness. Signed-off-by: Tvrtko Ursulin

[Intel-gfx] [PATCH 1/7] drm/i915/pmu: Fix enable count array size and bounds checking

2018-04-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Enable count array is supposed to have one counter for each possible engine sampler. As such array sizing and bounds checking is not correct when more engine samplers are added. At the same time tidy the assert for readability and robustness.

[Intel-gfx] [PATCH 1/7] drm/i915/pmu: Fix enable count array size and bounds checking

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Enable count array is supposed to have one counter for each possible engine sampler. As such array sizing and bounds checking is not correct when more engine samplers are added. At the same time tidy the assert for readability and robustness.