Re: [Intel-gfx] [PATCH 12/15] drm/i915: Two stage watermarks for g4x

2017-05-10 Thread Ville Syrjälä
On Mon, Apr 24, 2017 at 09:34:42AM +0200, Maarten Lankhorst wrote: > On 21-04-17 20:14, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > Implement proper two stage watermark programming for g4x. As with > > other pre-SKL platforms, the watermark

Re: [Intel-gfx] [PATCH 12/15] drm/i915: Two stage watermarks for g4x

2017-04-24 Thread Ville Syrjälä
On Mon, Apr 24, 2017 at 09:34:42AM +0200, Maarten Lankhorst wrote: > On 21-04-17 20:14, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > Implement proper two stage watermark programming for g4x. As with > > other pre-SKL platforms, the watermark

Re: [Intel-gfx] [PATCH 12/15] drm/i915: Two stage watermarks for g4x

2017-04-24 Thread Maarten Lankhorst
On 21-04-17 20:14, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Implement proper two stage watermark programming for g4x. As with > other pre-SKL platforms, the watermark registers aren't double > buffered on g4x. Hence we must sequence the

[Intel-gfx] [PATCH 12/15] drm/i915: Two stage watermarks for g4x

2017-04-21 Thread ville . syrjala
From: Ville Syrjälä Implement proper two stage watermark programming for g4x. As with other pre-SKL platforms, the watermark registers aren't double buffered on g4x. Hence we must sequence the watermark update carefully around plane updates. The code is quite