>-Original Message-
>From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>Sent: Friday, November 2, 2018 4:16 AM
>To: Srivatsa, Anusha
>Cc: intel-gfx@lists.freedesktop.org; Singh, Gaurav K
>;
>Jani Nikula ; Navare, Manasi D
>
>Subject: Re: [v4 6/7] i915/dp/fec: Configure the
On Wed, Oct 31, 2018 at 10:34:31PM +, Srivatsa, Anusha wrote:
>
>
> >-Original Message-
> >From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> >Sent: Wednesday, October 31, 2018 2:08 PM
> >To: Srivatsa, Anusha
> >Cc: intel-gfx@lists.freedesktop.org; Singh, Gaurav K
> >;
>
>-Original Message-
>From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>Sent: Wednesday, October 31, 2018 2:08 PM
>To: Srivatsa, Anusha
>Cc: intel-gfx@lists.freedesktop.org; Singh, Gaurav K
>;
>Jani Nikula ; Navare, Manasi D
>
>Subject: Re: [v4 6/7] i915/dp/fec: Configure the
On Tue, Oct 30, 2018 at 05:45:16PM -0700, Anusha Srivatsa wrote:
> If FEC is supported, the corresponding
> DP_TP_CTL register bits have to be configured.
>
> The driver has to program the FEC_ENABLE in DP_TP_CTL[30] register
> and wait till FEC_STATUS in DP_TP_CTL[28] is 1.
> Also add the warn
If FEC is supported, the corresponding
DP_TP_CTL register bits have to be configured.
The driver has to program the FEC_ENABLE in DP_TP_CTL[30] register
and wait till FEC_STATUS in DP_TP_CTL[28] is 1.
Also add the warn message to make sure that the control
register is already active while
