Required for turning on per-process page tables for the GPU.
Signed-off-by: Emma Anholt
Reviewed-by: Konrad Dybcio
Reviewed-by: Dmitry Baryshkov
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
b
This is an SMMU for the adreno gpu, and adding this compatible lets
the driver use per-fd page tables, which are required for security
between GPU clients.
Signed-off-by: Emma Anholt
Reviewed-by: Dmitry Baryshkov
---
v2: moved qcom,adreno-smmu earlier
arch/arm64/boot/dts/qcom/sm8250.dtsi | 2
This enable per-process page tables on the Qualcomm RB5 boards I'm
setting up for Mesa CI. Has survived a full deqp-vk run.
v2: moved qcom,adreno-smmu compatible earlier
Emma Anholt (2):
iommu: arm-smmu-impl: Add 8250 display compatible to the client list.
arm64: dts: qcom: sm8250: E
This is an SMMU for the adreno gpu, and adding this compatible lets
the driver use per-fd page tables, which are required for security
between GPU clients.
Signed-off-by: Emma Anholt
---
Tested with a full deqp-vk run on RB5, which did involve some iommu faults.
arch/arm64/boot/dts/qcom
Required for turning on per-process page tables for the GPU.
Signed-off-by: Emma Anholt
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index d8e1ef83c01b