Hello Marc,
On 1/16/2017 4:58 AM, Marc Zyngier wrote:
Hi Tyler,
On 12/01/17 18:15, Tyler Baicar wrote:
Currently external aborts are unsupported by the guest abort
handling. Add handling for SEAs so that the host kernel reports
SEAs which occur in the guest kernel.
Signed-off-by: Tyler
Hello Will,
On 1/16/2017 4:53 AM, Will Deacon wrote:
On Thu, Jan 12, 2017 at 11:15:18AM -0700, Tyler Baicar wrote:
SEA exceptions are often caused by an uncorrected hardware
error, and are handled when data abort and instruction abort
exception classes have specific values for their Fault
Hi Mark,
On 01/11/2017 01:45 PM, Mark Rutland wrote:
> On Wed, Jan 11, 2017 at 12:40:42PM -0600, Timur Tabi wrote:
>> On 01/11/2017 12:37 PM, Mark Rutland wrote:
>>> The name, as it is, is perfectly descriptive.
>>>
>>> Let's not sacrifice legibility over a non-issue.
>>
>> I don't want to kick a
On 16/01/17 14:11, Marc Zyngier wrote:
On 16/01/17 13:30, Marc Zyngier wrote:
On 13/01/17 14:56, Suzuki K Poulose wrote:
On 13/01/17 13:30, Marc Zyngier wrote:
[+ Suzuki, who wrote the whole cpus_have_const_cap thing]
[...]
But maybe we should have have some stronger guarantees that
On 16/01/17 13:30, Marc Zyngier wrote:
> On 13/01/17 14:56, Suzuki K Poulose wrote:
>> On 13/01/17 13:30, Marc Zyngier wrote:
>>> [+ Suzuki, who wrote the whole cpus_have_const_cap thing]
>>>
>
> [...]
>
>>> But maybe we should have have some stronger guarantees that we'll
>>> always get things
On 13/01/17 14:56, Suzuki K Poulose wrote:
> On 13/01/17 13:30, Marc Zyngier wrote:
>> [+ Suzuki, who wrote the whole cpus_have_const_cap thing]
>>
[...]
>> But maybe we should have have some stronger guarantees that we'll
>> always get things inlined, and that the "const" side is enforced:
>
>
Hi Tyler,
On 12/01/17 18:15, Tyler Baicar wrote:
> Currently external aborts are unsupported by the guest abort
> handling. Add handling for SEAs so that the host kernel reports
> SEAs which occur in the guest kernel.
>
> Signed-off-by: Tyler Baicar
> ---
>
On Thu, Jan 12, 2017 at 11:15:18AM -0700, Tyler Baicar wrote:
> SEA exceptions are often caused by an uncorrected hardware
> error, and are handled when data abort and instruction abort
> exception classes have specific values for their Fault Status
> Code.
> When SEA occurs, before killing the
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1484558821-15512-1-git-send-email-zhaoshengl...@huawei.com
Subject: [Qemu-devel] [PATCH RFC 0/6] target-arm: KVM64: Cross type vCPU support
=== TEST SCRIPT BEGIN ===
From: Shannon Zhao
This patch set adds support for Cross type vCPU in KVM-ARM64. It allows
userspace to request a different vCPU type with the physical ones and
check whether the physical CPUs could support that specific vCPU. If so,
KVM will trap the ID registers and
From: Shannon Zhao
Reset ID registers when creating the VCPUs and store the values per
VCPU. Also modify the get_invariant_sys_reg and set_invariant_sys_reg
to get/set the ID register from vcpu context.
Signed-off-by: Shannon Zhao
---
From: Shannon Zhao
When initializing KVM, check whether physical hardware is a
heterogeneous system through the MIDR values. If so, force userspace to
set the KVM_ARM_VCPU_CROSS feature bit. Otherwise, it should fail to
initialize VCPUs.
Signed-off-by: Shannon Zhao
From: Shannon Zhao
Add a new memeber in kvm_cpu_context to save the ID registers value.
Signed-off-by: Shannon Zhao
---
arch/arm64/include/asm/kvm_host.h | 46 +++
1 file changed, 46 insertions(+)
diff
From: Shannon Zhao
Add a capability to tell userspace that KVM supports cross type vCPU.
Add a cpu feature for userspace to set when it doesn't use host type
vCPU and kvm_vcpu_preferred_target return the host MIDR register value
so that userspace can check whether its
From: Shannon Zhao
Check if the configuration is fine.
Signed-off-by: Shannon Zhao
---
arch/arm64/kvm/sys_regs.c | 32 +++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kvm/sys_regs.c
From: Shannon Zhao
Move invariant_sys_regs before emulate_sys_reg so that it can be used
later.
Signed-off-by: Shannon Zhao
---
arch/arm64/kvm/sys_regs.c | 193 --
1 file changed, 116 insertions(+),
From: Shannon Zhao
Signed-off-by: Shannon Zhao
---
arch/arm64/kvm/sys_regs.c | 83 ---
1 file changed, 50 insertions(+), 33 deletions(-)
diff --git a/arch/arm64/kvm/sys_regs.c
From: Shannon Zhao
If user requests a specific type vCPU which is not same with the
physical ones and if kvm supports cross type vCPU, we set the
KVM_ARM_VCPU_CROSS bit and set the CPU ID registers.
Signed-off-by: Shannon Zhao
---
From: Shannon Zhao
Signed-off-by: Shannon Zhao
---
hw/arm/virt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 4b301c2..49b7b65 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -166,6 +166,7 @@ static
From: Shannon Zhao
This patch set support use cross type vCPU when using KVM on ARM and add
two new CPU types: generic and cortex-a72.
You can test this patch set with QEMU using
-cpu cortex-a53/cortex-a57/generic/cortex-a72
These patches can be fetched from:
From: Shannon Zhao
Signed-off-by: Shannon Zhao
---
target/arm/kvm-consts.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/arm/kvm-consts.h b/target/arm/kvm-consts.h
index a2c9518..fc01ac5 100644
--- a/target/arm/kvm-consts.h
+++
From: Shannon Zhao
Add the ARM Cortex-A72 processor definition. It's similar to A57.
Signed-off-by: Shannon Zhao
---
hw/arm/virt.c | 1 +
target/arm/cpu64.c | 56 ++
2 files changed, 57
From: Shannon Zhao
Signed-off-by: Shannon Zhao
---
linux-headers/asm-arm64/kvm.h | 1 +
linux-headers/linux/kvm.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h
index
From: Shannon Zhao
Add a generic type cpu, it's useful for migration when running on
different hardwares.
Signed-off-by: Shannon Zhao
---
target/arm/cpu64.c | 54 ++
1 file changed, 54
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