Hi Christoffer,
Christoffer Dall writes:
> On Wed, Jan 18, 2017 at 06:05:46PM +, Mark Rutland wrote:
>> On Wed, Jan 18, 2017 at 04:17:18PM +, Punit Agrawal wrote:
>> > Mark Rutland writes:
>> >
>> > > On Wed, Jan 18, 2017 at 02:51:31PM +, Punit Agrawal wrote:
>> > >> I should've cl
On Wed, Jan 18, 2017 at 06:05:46PM +, Mark Rutland wrote:
> On Wed, Jan 18, 2017 at 04:17:18PM +, Punit Agrawal wrote:
> > Mark Rutland writes:
> >
> > > On Wed, Jan 18, 2017 at 02:51:31PM +, Punit Agrawal wrote:
> > >> I should've clarified in my reply that I wasn't looking to suppor
On Wed, Jan 18, 2017 at 04:17:18PM +, Punit Agrawal wrote:
> Mark Rutland writes:
>
> > On Wed, Jan 18, 2017 at 02:51:31PM +, Punit Agrawal wrote:
> >> I should've clarified in my reply that I wasn't looking to support the
> >> third instance from Mark's examples above - "monitor all vCPU
Mark Rutland writes:
> On Wed, Jan 18, 2017 at 02:51:31PM +, Punit Agrawal wrote:
>> I should've clarified in my reply that I wasn't looking to support the
>> third instance from Mark's examples above - "monitor all vCPUs on a
>> pCPU". I think it'll be quite expensive to figure out which thr
On Wed, Jan 18, 2017 at 02:51:31PM +, Punit Agrawal wrote:
> I should've clarified in my reply that I wasn't looking to support the
> third instance from Mark's examples above - "monitor all vCPUs on a
> pCPU". I think it'll be quite expensive to figure out which threads from
> a given pool are
Will Deacon writes:
> On Wed, Jan 18, 2017 at 01:01:40PM +, Punit Agrawal wrote:
>> Mark Rutland writes:
>>
>> > On Wed, Jan 18, 2017 at 11:21:21AM +, Marc Zyngier wrote:
>> >> On 10/01/17 11:38, Punit Agrawal wrote:
>> >> > +#define VM_MASKGENMASK_ULL(31, 0)
>> >> > +#define EV
Marc Zyngier writes:
> On 18/01/17 13:01, Punit Agrawal wrote:
>> Mark Rutland writes:
>>
>>> On Wed, Jan 18, 2017 at 11:21:21AM +, Marc Zyngier wrote:
On 10/01/17 11:38, Punit Agrawal wrote:
> +#define VM_MASK GENMASK_ULL(31, 0)
> +#define EVENT_MASK GENMASK_ULL(32, 39)
On Wed, Jan 18, 2017 at 01:01:40PM +, Punit Agrawal wrote:
> Mark Rutland writes:
>
> > On Wed, Jan 18, 2017 at 11:21:21AM +, Marc Zyngier wrote:
> >> On 10/01/17 11:38, Punit Agrawal wrote:
> >> > +#define VM_MASK GENMASK_ULL(31, 0)
> >> > +#define EVENT_MASK GENMASK_ULL(32, 39)
> >
On 18/01/17 13:01, Punit Agrawal wrote:
> Mark Rutland writes:
>
>> On Wed, Jan 18, 2017 at 11:21:21AM +, Marc Zyngier wrote:
>>> On 10/01/17 11:38, Punit Agrawal wrote:
+#define VM_MASK GENMASK_ULL(31, 0)
+#define EVENT_MASKGENMASK_ULL(32, 39)
+#define EVENT_SHIFT
Hi Marc,
Marc Zyngier writes:
> +Mark
>
> On 10/01/17 11:38, Punit Agrawal wrote:
>> Both AArch32 and AArch64 mode of the ARMv8 architecture support trapping
>> certain VM operations, e.g, TLB and cache maintenance
>> operations. Selective trapping of these operations for specific VMs can
>> be
Mark Rutland writes:
> On Wed, Jan 18, 2017 at 11:21:21AM +, Marc Zyngier wrote:
>> On 10/01/17 11:38, Punit Agrawal wrote:
>> > +#define VM_MASK GENMASK_ULL(31, 0)
>> > +#define EVENT_MASKGENMASK_ULL(32, 39)
>> > +#define EVENT_SHIFT (32)
>> > +
>> > +#define to_pid(cfg)
On Wed, Jan 18, 2017 at 11:21:21AM +, Marc Zyngier wrote:
> On 10/01/17 11:38, Punit Agrawal wrote:
> > +#define VM_MASKGENMASK_ULL(31, 0)
> > +#define EVENT_MASK GENMASK_ULL(32, 39)
> > +#define EVENT_SHIFT(32)
> > +
> > +#define to_pid(cfg)((cfg) & VM_MASK)
> > +#define to
+Mark
On 10/01/17 11:38, Punit Agrawal wrote:
> Both AArch32 and AArch64 mode of the ARMv8 architecture support trapping
> certain VM operations, e.g, TLB and cache maintenance
> operations. Selective trapping of these operations for specific VMs can
> be used to track the frequency with which the
Both AArch32 and AArch64 mode of the ARMv8 architecture support trapping
certain VM operations, e.g, TLB and cache maintenance
operations. Selective trapping of these operations for specific VMs can
be used to track the frequency with which these occur during execution.
Add a software PMU on the h
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