Hi Rob,
On 5/4/2016 6:20 AM, Rob Herring wrote:
On Mon, May 02, 2016 at 01:51:47PM -0700, Ray Jui wrote:
Update the iProc GPIO binding document to add new compatible strings
"brcm,iproc-gpio-v2" and "brcm,iproc-gpio-v3" for the 2nd and 3rd
generation of the iProc GPIO controllers
Signed-off-by
On Wed, May 04, 2016 at 04:26:46PM +0200, Djalal Harouni wrote:
> This is version 2 of the VFS:userns support portable root filesystems
> RFC. Changes since version 1:
>
> * Update documentation and remove some ambiguity about the feature.
> Based on Josh Triplett comments.
Thanks for the clari
On Wed, May 04, 2016 at 12:36:36PM +0200, Borislav Petkov wrote:
> On Tue, May 03, 2016 at 01:47:51PM -0500, Alex Thorlton wrote:
> > I think this will work for us, for the most part. Only issue is that
> > the efi_call_virt macro is only accessible from inside
> > runtime-wrappers.c. If we could
On Wed, May 4, 2016 at 5:02 PM, Daniel Vetter wrote:
> On Wed, May 04, 2016 at 08:57:13AM -0600, Jonathan Corbet wrote:
>> On Wed, 4 May 2016 16:18:27 +0200
>> Daniel Vetter wrote:
>>
>> > > I'd really like to converge on the markup question, so that we can start
>> > > using all the cool stuff w
When mapping an IRQ, it is possible that a mapping for the IRQ already
exists. If mapping does exist then there are the following issues with
regard to the handling of the IRQ type settings ...
1. If the domain is part of a hierarchy, then:
a. We do not check that the type settings for the exist
If we fail to map the address space for the GIC distributor or CPU
interface, then don't attempt to initialise the chip, just WARN and
return.
Signed-off-by: Jon Hunter
Acked-by: Marc Zyngier
---
drivers/irqchip/irq-gic.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git
For some devices the IRQ trigger type for a device is read from
firmware, such as device-tree. The IRQ trigger type is typically read
when the mapping for IRQ is created, which is before the IRQ is
requested. Hence, the IRQ trigger type is programmed when mapping the
IRQ and not when requesting the
In the function, setup_irq(), we don't check that the descriptor
returned from irq_to_desc() is valid before we start using it. For
example chip_bus_lock() called from setup_irq(), assumes that the
descriptor pointer is valid and doesn't check before dereferencing it.
In many other functions inclu
There are only 3 differences (not including the name) in the definitions
of the gic_chip and gic_eoimode1_chip structures. Instead of statically
defining the gic_eoimode1_chip structure, remove it and populate the
eoimode1 functions dynamically for the appropriate GIC irqchips.
Signed-off-by: Jon
On Tue, May 03, 2016 at 02:16:29PM +0200, Thierry Reding wrote:
> Hi Mark,
>
> The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca:
>
> Linux 4.6-rc1 (2016-03-26 16:03:24 -0700)
Pulled, thanks.
signature.asc
Description: PGP signature
Commit afbbd2338176 ("irqchip/gic: Document optional Clock and Power
Domain properties") updated the device-tree binding documentation for
the GIC to add optional clock and power domain information. Currently,
the GIC driver does support these optional properties and there do not
appear to be any G
To support GICs that require runtime-pm, it is necessary to add a
platform driver, so that the probing of the chip can be deferred if
resources, such as a power-domain, is not yet available.
To prepare for adding a platform driver:
1. Drop the __init section from the gic_dist_config(), gic_dist_i
To re-use the code that initialises the GIC (found in
__gic_init_bases()), from within a platform driver, it is necessary to
move the code from the __init section so that it is always present and
not removed. Unfortunately, it is not possible to simply drop the __init
from the function declaration
Add a platform driver to support non-root GICs that require runtime
power-management. Currently, only non-root GICs are supported because
the functions, smp_cross_call() and set_handle_irq(), that need to
be called for a root controller are located in the __init section and
so cannot be called by t
If the GIC initialisation fails, then currently we do not return an error
or clean-up afterwards. Although for root controllers, this failure may be
fatal anyway, for secondary controllers, it may not be fatal and so return
an error on failure and clean-up.
For non-banked GIC controllers, make sur
Some IRQ chips may be located in a power domain outside of the CPU
subsystem and hence will require device specific runtime power
management. In order to support such IRQ chips, add a pointer for a
device structure to the irq_chip structure, and if this pointer is
populated by the IRQ chip driver a
Move the code that configures a GIC via device-tree into it's own
function. This will allow us to re-use this function when adding a
platform driver to support GICs that require power-management.
Signed-off-by: Jon Hunter
---
drivers/irqchip/irq-gic.c | 37 +
Some IRQ chips, such as GPIO controllers or secondary level interrupt
controllers, may require require additional runtime power management
control to ensure they are accessible. For such IRQ chips, it makes sense
to enable the IRQ chip when interrupts are requested and disabled them
again once all
If the interrupt configuration matches the current configuration, then
don't bother writing the configuration again.
Signed-off-by: Jon Hunter
Acked-by: Marc Zyngier
---
drivers/irqchip/irq-gic-common.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/
The firmware parameter that contains the IRQ sense bits may also contain
other data. When return the IRQ type, bits outside of these sense bits
should be masked. If these bits are not masked and
irq_create_fwspec_mapping() is called to map an IRQ, then the comparison
of the type returned from irq_d
Setting the interrupt type for private peripheral interrupts (PPIs) may
not be supported by a given GIC because it is IMPLEMENTATION DEFINED
whether this is allowed. There is no way to know if setting the type is
supported for a given GIC and so the value written is read back to
verify it matches t
The Tegra210 has a 2nd level interrupt controller located in a separate
power domain to the main GIC interrupt controller and hence requires
runtime-pm support.
Add a platform driver for the GICs that require runtime-pm and make the
necessary changes to the genirq and irqdomain core to support IRQ
On 04/14/2016 01:35 PM, David Lechner wrote:
The "da8xx USB clocks" patch series was growing a bit too big, so on the advice
of Sekhar Nori, I am splitting it into two parts. This part contains everything
in drivers/ and the other part will contain everything in arch/arm/mach-davinci.
This patch
On Wed, May 04, 2016 at 11:28:51AM -0400, Lyude wrote:
> During boot time, MST devices usually send a ton of hotplug events
> irregardless of whether or not any physical hotplugs actually occurred.
> Hotplugs mean connectors being created/destroyed, and the number of DRM
> connectors changing under
This reverts commit 5938448b99275cba95167c3f9d39ca9225fdad38.
It turns out that the commit that made these variables unused is wrong
so we're about to revert it. Bring back the variables in prepration.
Signed-off-by: John Keeping
---
v2: Add "ASoC: rockchip: " prefix to subject
sound/soc/rock
This reverts commit eba65d179c1149cf79e68608d452631f33d7f017.
This broke audio on Veyron Jerry Chromebooks and I now cannot reproduce
the problem I was trying to fix even with this commit reverted, so it
seems that this was completely the wrong thing to do.
Reported-by: Enric Balletbo Serra
Sign
On Tue, May 03, 2016 at 09:43:20PM +0200, Robert Jarzmik wrote:
> You probably mean the BITCLK clock.
> What is a bit pesky about this clock is that it can either be mastered by
> digital controller and the codec is a slave, or the other way around.
That's a bit surprising - I've never encounter
Hi Marc,
On 5/4/2016 12:49 AM, Marc Zyngier wrote:
On 04/05/16 00:47, Ray Jui wrote:
Alex Barba discovered Broadcom NS2 GICv2m
implementation has an erratum where the MSI data needs to be the SPI
number subtracted by an offset of 32, for the correct MSI interrupt to
be triggered.
We are aware
Pratyush Anand wrote:
Its unique to SBSA because you have very little timeout here. kexec-tools
upstream does not have any mechanism to handle watchdog timeout. Lets say even
if we implement a framework there, the best it can do is to ping the watchdog
again.
Ok, so it's more accurate to say th
Em Wed, 4 May 2016 11:34:08 +0200
Markus Heiser escreveu:
> Hi all, (hi Jonathan, please take note of my offer below)
>
> Am 03.05.2016 um 16:31 schrieb Daniel Vetter :
>
> > Hi all,
> >
> > So sounds like moving ahead with rst/sphinx is the option that should
> > allow us to address everyone'
On Wed, 04 May 2016, Markus Heiser wrote:
> Correct my, if I'am wrong. I'am a bit unfamiliar with DOCPROC in
> particular with your "MARKDOWNREADY := gpu.xml" process.
>
> As I understood, you convert markdown to docbook within the kernel-doc
> script using pandoc's executable? ... I don't face t
On Wed, May 04, 2016 at 04:35:28PM +0200, Miroslav Benes wrote:
> On Wed, 4 May 2016, Josh Poimboeuf wrote:
>
> > On Wed, May 04, 2016 at 01:58:47PM +0200, Miroslav Benes wrote:
> > > On Tue, 3 May 2016, Josh Poimboeuf wrote:
> > >
> > > > On Tue, May 03, 2016 at 09:39:48PM -0500, Josh Poimboeuf
On Wed, May 04, 2016 at 11:28:53AM -0400, Lyude wrote:
> s/modest/modeset/
> s/aftert/after/
>
> Signed-off-by: Lyude
Applied to drm-misc, thanks.
-Daniel
> ---
> drivers/gpu/drm/drm_fb_helper.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm
On 5/4/2016 8:57 AM, Chris Brand wrote:
You have a typo in the subject line - "Indtroduce".
Thanks, but now this patch will be gone based on review comments from
Marc on PATCH 2/2.
Chris
On Tue, May 3, 2016 at 4:47 PM, Ray Jui wrote:
Update the GICv2m binding document by adding an opt
+Dave
Hi Timur,
On 04/05/2016:09:21:43 AM, Timur Tabi wrote:
> Pratyush Anand wrote:
> >static irqreturn_t sbsa_gwdt_interrupt(int irq, void *dev_id)
> >{
> >+struct sbsa_gwdt *gwdt = (struct sbsa_gwdt *)dev_id;
> >+struct watchdog_device *wdd = &gwdt->wdd;
> >+u64 timeout = (u64)gwdt
You have a typo in the subject line - "Indtroduce".
Chris
On Tue, May 3, 2016 at 4:47 PM, Ray Jui wrote:
> Update the GICv2m binding document by adding an optional property
> 'arm,msi-offset-spi'.
>
> Some implementations of gicv2m have an erratum where the MSI data is
> the SPI number subtracte
Am 04.05.2016 um 15:43 schrieb Daniel Vetter :
> On Wed, May 04, 2016 at 02:40:29PM +0200, Markus Heiser wrote:
>>> On Wed, 04 May 2016, Markus Heiser wrote:
>>> I'd be *very* hesitant about adding the kind of things you do in
>>> reformat_block_rst to kernel-doc. IMO the extraction from kernel-d
When a partition is not aligned by 4KB, mount -o dax succeeds,
but any read/write access to the filesystem fails, except for
metadata update.
Call bdev_direct_access to check the alignment when -o dax is
specified.
Signed-off-by: Toshi Kani
Reviewed-by: Boaz Harrosh
Reviewed-by: Ross Zwisler
C
Wanted to add a note here:
> + * Add two timespec64 values and do a safety check for overflow.
> + * It's assumed that both values are valid (>= 0).
> + * And, each timespec64 is in normalized form.
> + */
> +struct timespec64 timespec64_add_safe(const struct timespec64 lhs,
> +
On Tue, 2016-05-03 at 15:41 +, Kani, Toshimitsu wrote:
> On Tue, 2016-05-03 at 08:43 -0600, Ross Zwisler wrote:
> > On Tue, May 03, 2016 at 11:00:21AM +0200, Jan Kara wrote:
> > > On Tue 03-05-16 01:44:10, Christoph Hellwig wrote:
> > > >
> > > > Please come up with a version that doesn't requ
On Wed, May 04, 2016 at 10:42:23AM +0200, Petr Mladek wrote:
> On Thu 2016-04-28 15:44:48, Josh Poimboeuf wrote:
> > Change livepatch to use a basic per-task consistency model. This is the
> > foundation which will eventually enable us to patch those ~10% of
> > security patches which change funct
rlimits are stored in task->signal and are guaranteed to remain valid as
long as the task struct is valid. All modifications are protected by
locking task->group_leader. Additionally changes to RLIMIT_CPU need
task->sighand.
do_prlimit takes tasklist_lock, which as a side effect gurantees stable
-
On Wed, May 04, 2016 at 08:35:24AM +0200, Ingo Molnar wrote:
>
> * Matt Fleming wrote:
>
> > From: Wang YanQing
> >
> > We can't just break out when meet start is equal to zero,
>
> Hm, wot?
>
> Thanks,
>
> Ingo
Sorry for my poor English ,and poor commit message, this bring
trouble f
2016-05-05 0:30 GMT+09:00 Joonsoo Kim :
> 2016-05-04 18:21 GMT+09:00 Michal Hocko :
>> On Wed 04-05-16 11:14:50, Joonsoo Kim wrote:
>>> On Tue, May 03, 2016 at 10:53:56AM +0200, Michal Hocko wrote:
>>> > On Tue 03-05-16 14:23:04, Joonsoo Kim wrote:
>> [...]
>>> > > Memory saving looks as following.
On Tue, May 03, 2016 at 11:11:53AM -0400, Chris Mason wrote:
> # pick a single core, in my case cpus 0,20 are the same core
> # cpu_hog is any program that spins
> #
> taskset -c 20 cpu_hog &
>
> # schbench -p 4 means message passing mode with 4 byte messages (like
> # pipe test), no sleeps, just
On Wed, 04 May 2016, Jonathan Corbet wrote:
> The sphinx/rst approach does seem, to me, to be the right one, with the
> existing DocBook structure remaining in place for those who want/need
> it. I'm inclined toward my stuff as a base to work with, obviously :) But
> it's hackish at best and need
From: Lee Jones
When there was no other way to match a I2C device to driver i2c_match_id()
was exclusively used. However, now there are other types of tables which
are commonly supplied, matching on an i2c_device_id table is used less
frequently. Instead of _always_ calling i2c_match_id() from
From: Lee Jones
This will aid the seamless removal of the current probe()'s, more
commonly unused than used second parameter. Most I2C drivers can
simply switch over to the new interface, others which have DT
support can use its own matching instead and others can call
i2c_match_id() themselves.
From: Lee Jones
As part of an effort to rid the mostly unused second parameter for I2C
related .probe() functions and to conform to other existing frameworks
we're moving over to a temporary replacement .probe() call-back.
Acked-by: Grant Likely
Signed-off-by: Lee Jones
Signed-off-by: Kieran B
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
Linus,
Please git pull the following tag:
git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git
for-linus-4.6-rc6-tag
xen: regression fixes for 4.6-rc6
- - Fix two regressions causing crashes in 32-bit PV guests.
- - Fix a regression in the
>>> On 04.05.16 at 17:34, wrote:
> On 04/05/16 14:30, David Vrabel wrote:
>> On 04/05/16 14:02, Jan Beulich wrote:
>>> The copying of ring data was wrong for two cases: For a full ring
>>> nothing got copied at all (as in that case the canonicalized producer
>>> and consumer indexes are identical)
On Wed, 2016-05-04 at 16:14 +0100, Bryan O'Donoghue wrote:
> On Wed, 2016-05-04 at 17:32 +0300, Andy Shevchenko wrote:
> >
> > Intel Quark has DesignWare UART. Move the code from 8250_pci to
> > 8250_lpss.
> >
> > Reviewed-by: Bryan O'Donoghue
> > Signed-off-by: Andy Shevchenko
> > ---
> > dri
On 04/05/16 14:30, David Vrabel wrote:
> On 04/05/16 14:02, Jan Beulich wrote:
>> The copying of ring data was wrong for two cases: For a full ring
>> nothing got copied at all (as in that case the canonicalized producer
>> and consumer indexes are identical). And in case one or both of the
>> cano
On 05/04/2016 12:01 PM, Jonathan Cameron wrote:
> On 03/05/16 14:01, Crestez Dan Leonard wrote:
>> On 05/01/2016 08:34 PM, Jonathan Cameron wrote:
>>> On 29/04/16 20:02, Crestez Dan Leonard wrote:
Right now it is possible to only enable some of the x/y/z channels, for
example you can enab
Within a target, I/O requests stem from different paths, which might vary
in terms of the data structures being allocated, context, etc. This
might impact how the request is treated, or how memory is freed once
the bio is completed.
Add two different types of I/Os: (i) NVM_IOTYPE_SYNC, which indic
The number of ppas contained on a request is not necessarily the number
of pages that it maps to neither on the target nor on the device side.
In order to avoid confusion, rename nr_pages to nr_ppas since it is what
the variable actually contains.
Signed-off-by: Javier González
---
drivers/light
On Wed, May 04, 2016 at 12:37:01PM +0200, Peter Zijlstra wrote:
> +static int select_idle_cpu(struct task_struct *p, struct sched_domain *sd,
> int target)
> +{
> + struct sched_domain *this_sd = rcu_dereference(*this_cpu_ptr(&sd_llc));
> + u64 time, cost;
> + s64 delta;
> + int c
2016-05-04 18:23 GMT+09:00 Michal Hocko :
> On Wed 04-05-16 11:35:00, Joonsoo Kim wrote:
> [...]
>> Oops... I think more deeply and change my mind. In recursion case,
>> stack is consumed more than 1KB and it would be a problem. I think
>> that best approach is using preallocated per cpu entry. It
Add two precalculated values to nvm_rq: (i) maximum number of sectors
per general request; and (ii) minimum number of sectors per write
request.
Signed-off-by: Javier González
---
drivers/lightnvm/core.c | 3 +++
include/linux/lightnvm.h | 4 +++-
2 files changed, 6 insertions(+), 1 deletion(-)
Eliminate redundant variable that has been superseded by the new
variables emerging from the Open-Channel SSD spec.
Signed-off-by: Javier González
---
drivers/lightnvm/rrpc.c | 2 +-
include/linux/lightnvm.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/lightnvm/r
s/modest/modeset/
s/aftert/after/
Signed-off-by: Lyude
---
drivers/gpu/drm/drm_fb_helper.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 15204c0..7778a0e 100644
--- a/drivers/gpu/drm/drm_fb_helper
2016-05-04 18:21 GMT+09:00 Michal Hocko :
> On Wed 04-05-16 11:14:50, Joonsoo Kim wrote:
>> On Tue, May 03, 2016 at 10:53:56AM +0200, Michal Hocko wrote:
>> > On Tue 03-05-16 14:23:04, Joonsoo Kim wrote:
> [...]
>> > > Memory saving looks as following. (Boot 4GB memory system with
>> > > page_owne
On 05/04/2016 05:10 AM, Jonathan Cameron wrote:
> On 01/05/16 21:36, Andrew F. Davis wrote:
>> These drivers can use regmap fields to access fields in registers, this
>> allows us to remove some macros/defines and simplify code, do this here.
>>
>> Signed-off-by: Andrew F. Davis
> This could almos
During boot time, MST devices usually send a ton of hotplug events
irregardless of whether or not any physical hotplugs actually occurred.
Hotplugs mean connectors being created/destroyed, and the number of DRM
connectors changing under us. This isn't a problem if we use
fb_helper->connector_count
During boot, MST hotplugs are generally expected (even if no physical
hotplugging occurs) and result in DRM's connector topology changing.
This means that using num_connector from the current mode configuration
can lead to the number of connectors changing under us. This can lead to
some nasty scen
From: Lee Jones
Also remove unused second probe() parameter 'i2c_device_id'.
Acked-by: Grant Likely
Signed-off-by: Lee Jones
Signed-off-by: Kieran Bingham
---
Changes since v4
- Rename .probe2 to probe_new
---
drivers/mfd/as3722.c | 12 ++--
1 file changed, 2 insertions(+), 10 dele
Let's introduce a new msi_domain_info flag value, MSI_FLAG_IRQ_REMAPPING
meant to tell the domain supports IRQ REMAPPING, also known as Interrupt
Translation Service. On Intel HW this IRQ remapping capability is
abstracted on IOMMU side while on ARM it is abstracted on MSI controller
side. This fla
From: Chao Yu
Reuse get_extent_info for readability.
Signed-off-by: Chao Yu
---
fs/f2fs/extent_cache.c | 3 +--
fs/f2fs/f2fs.h | 8
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/fs/f2fs/extent_cache.c b/fs/f2fs/extent_cache.c
index c859bb0..5bfcdb9 100644
---
This patch implements the msi_doorbell_info callback in the
gicv2m driver.
The driver now is able to return its doorbell characteristics
(base, size, prot). A single doorbell is exposed.
This will allow the msi layer to iommu_map this doorbell when
requested.
Signed-off-by: Eric Auger
---
v8 -
From: Chao Yu
Restructure struct seg_entry to eliminate holes in it, after that,
in 32-bits machine, it reduces size from 32 bytes to 24 bytes; in
64-bits machine, it reduces size from 56 bytes to 40 bytes.
Signed-off-by: Chao Yu
---
fs/f2fs/segment.h | 9 +
1 file changed, 5 insertion
On 05/04/2016 05:08 AM, Jonathan Cameron wrote:
> On 01/05/16 21:36, Andrew F. Davis wrote:
>> These AFEs have 4 ADC mesuring stages (called LED2, ALED2, LED1, and
>> ALED1 in the datasheet), we map these as channels, these stages can serve
>> different purposes depending on the application. For in
On Wed, May 04, 2016 at 07:57:10AM -0700, Greg Kroah-Hartman wrote:
> On Wed, May 04, 2016 at 04:39:59PM +0200, Thierry Reding wrote:
> > From: Thierry Reding
> >
> > There are three EHCI controllers on Tegra SoCs, each with its own reset
> > line. However, the first controller contains a set of
With the newly introduced helper functions the skb pulling is hidden
in the checksumming function - and undone before returning to the
caller.
The IGMP and MLD query parsing functions in the bridge still
assumed that the skb is pointing to the beginning of the IGMP/MLD
message while it is now kept
On Wed, May 04, 2016 at 05:08:48PM +0200, Peter Zijlstra wrote:
> On Wed, May 04, 2016 at 02:44:20PM +0100, Mark Rutland wrote:
> > > Ok, how about the below? (based on next-20160422).
> >
> > Peter, any thoughts?
> >
>
> Right, I have it queued, should hopefully hit tip tomorrow someplace.
Che
Hi Marc,
On 05/04/2016 03:21 PM, Marc Zyngier wrote:
> On 28/04/16 09:22, Eric Auger wrote:
>> This patch handles the iommu mapping of MSI doorbells that require to
>> be mapped in an iommu domain. This happens on msi_domain_alloc/free_irqs
>> since this is called in code that can sleep (pci_enable
From: Chao Yu
Each of fields in struct f2fs_xattr_entry will be assigned later,
so previously we don't need to memset the struct.
Signed-off-by: Chao Yu
---
fs/f2fs/xattr.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/fs/f2fs/xattr.c b/fs/f2fs/xattr.c
index 8ad5847..4be7a9d 100644
--- a/
Hi Michael,
I know this is an old patch already applied, but I noticed the following:
On 25-03-16 15:46, Michael Thalmeier wrote:
This adds the I2C phy interface for the pn533 driver. This way the driver can
be used to interact with I2C connected pn532.
Signed-off-by: Michael Thalmeier
---
Hyper-V Sockets (hv_sock) supplies a byte-stream based communication
mechanism between the host and the guest. It's somewhat like TCP over
VMBus, but the transportation layer (VMBus) is much simpler than IP.
With Hyper-V Sockets, applications between the host and the guest can talk
to each other d
From: Lee Jones
This function provides a single call for all I2C devices which need to
match firstly using traditional OF means i.e by of_node, then if that
fails we attempt to match using the supplied I2C client name with a
list of supplied compatible strings with the ',' string
removed. The la
We plan to use msi_get_domain_info in VFIO module so let's export it.
Signed-off-by: Eric Auger
---
v2 -> v3:
- remove static implementation in case CONFIG_PCI_MSI_IRQ_DOMAIN is not set
---
kernel/irq/msi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c
From: Chao Yu
In find_fsync_dnodes, get_tmp_page will read dnode page synchronously,
previously, ra_meta_page did the same work, which is redundant, remove
it.
Signed-off-by: Chao Yu
---
fs/f2fs/recovery.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/fs/f2fs/recovery.c b/fs/f2fs/recove
From: Lee Jones
Currently the I2C framework insists on devices supplying an I2C ID
table. Many of the devices which do so unnecessarily adding quite a
few wasted lines to kernel code. This patch allows drivers a means
to 'not' supply the aforementioned table and match on DT match tables
instead
The purpose is to be able to retrieve the MSI doorbells of an irqchip.
This is now needed since on some platforms those doorbells must be
iommu mapped (in case the MSIs transit through an IOMMU that do not
bypass those transactions).
The assumption is there is a maximum of one doorbell region per
This patch handles the iommu mapping of MSI doorbells that require to
be mapped in an iommu domain. This happens on msi_domain_alloc/free_irqs
since this is called in code that can sleep (pci_enable/disable_msi):
iommu_map/unmap is not stated as atomic. On msi_domain_(de)activate and
msi_domain_set
Currently the MSI message is composed by directly calling
irq_chip_compose_msi_msg and erased by setting the memory to zero.
On some platforms, we will need to complexify this composition to
properly handle MSI emission through IOMMU. Also we will need to track
when the MSI message is erased.
We
On MSI message composition we now use the MSI doorbell's IOVA in
place of the doorbell's PA in case the device is upstream to an
IOMMU that requires MSI addresses to be mapped. The doorbell's
allocation and mapping happened on an early stage (pci_enable_msi).
Signed-off-by: Eric Auger
---
v8 ->
This patch set finally pops up again, after a long time stuck somewhere in the
midst of my stack.
As it stood last year, the requirements were to rename probe2 to probe_new, and
ensure that it was correctly tested. The rename was the easy bit, but the
testing took me more time to get things set up
2016-05-04 18:04 GMT+09:00 Michal Hocko :
> On Wed 04-05-16 15:27:48, Joonsoo Kim wrote:
>> On Wed, Apr 20, 2016 at 03:47:27PM -0400, Michal Hocko wrote:
> [...]
>> > +bool compaction_zonelist_suitable(struct alloc_context *ac, int order,
>> > + int alloc_flags)
>> > +{
>> > + struct zo
On Wed, 2016-05-04 at 17:32 +0300, Andy Shevchenko wrote:
> Intel Quark has DesignWare UART. Move the code from 8250_pci to
> 8250_lpss.
>
> Reviewed-by: Bryan O'Donoghue
> Signed-off-by: Andy Shevchenko
> ---
> drivers/tty/serial/8250/8250_lpss.c | 11 +++
> drivers/tty/serial/8250/825
From: Lee Jones
Here we're providing dereference protection for i2c_match_id(), which
saves us having to do it each time it's called. We're also stripping
out the (now) needless checks in i2c_device_match(). This patch paves
the way for other, similar code trimming.
Acked-by: Grant Likely
Sig
Hi Michael,
On 28-04-16 20:18, Olliver Schinagl wrote:
Hi Michael,
I know i'm a little late to the party, but why did you not name the
directory/driver pn53x? I don't think we should debate wether a 533 is a
532 with a USB added, or wether a 532 is a 533 with the USB stripped, I
was just curiou
The ITS is the first ARM MSI controller advertising the new
MSI_FLAG_IRQ_REMAPPING flag. It does so because it supports
interrupt translation service. This HW support offers isolation
of MSIs, feature used when using KVM device passthrough.
Signed-off-by: Eric Auger
---
v5: new
---
drivers/irq
This series implements the MSI address mapping/unmapping in the MSI layer.
IOMMU binding happens on pci_enable_msi since this function can sleep and
return errors. On msi_domain_set_affinity, msi_domain_(de)activate, which
are not allowed to sleep, we simply look for the already existing binding.
On Tue, May 03, 2016 at 10:52:33PM -0700, Yinghai Lu wrote:
> On Tue, May 3, 2016 at 10:08 PM, Yinghai Lu wrote:
> > On Tue, May 3, 2016 at 6:25 PM, Bjorn Helgaas wrote:
> >> I did not propose changing any user-visible ABI. To recap what I did
> >> propose:
> >
> > I want to avoid introduce one
From: Andy Lutomirski
> Sent: 02 May 2016 19:13
...
> I hope your plans include rewriting the current stack unwinder
> completely. The thing in print_context_stack is (a)
> hard-to-understand and hard-to-modify crap and (b) is called in a loop
> from another file using totally ridiculous conventio
From: Lee Jones
A great deal of I2C devices are currently matched via DT node name, and
as such the compatible naming convention of ',' has gone
somewhat awry - some nodes don't supply one, some supply an arbitrary
string and others the correct device name with an arbitrary vendor prefix.
In an
Hyper-V Sockets (hv_sock) supplies a byte-stream based communication
mechanism between the host and the guest. It's somewhat like TCP over
VMBus, but the transportation layer (VMBus) is much simpler than IP.
With Hyper-V Sockets, applications between the host and the guest can talk
to each other d
2016-05-04 17:34 GMT+09:00 Alexander Potapenko :
> On Tue, May 3, 2016 at 7:13 AM, wrote:
>> From: Joonsoo Kim
>>
>> Recently, we allow to save the stacktrace whose hashed value is 0.
>> It causes the problem that stackdepot could return 0 even if in success.
>> User of stackdepot cannot disting
This is for the hv_sock driver, which introduces AF_HYPERV(42).
Signed-off-by: Dexuan Cui
Cc: "K. Y. Srinivasan"
Cc: Haiyang Zhang
Cc: Vitaly Kuznetsov
Cc: Cathy Avery
---
net/core/sock.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/net/core/sock.c b/net/core/soc
On 05/04/2016 05:02 AM, Jonathan Cameron wrote:
> On 01/05/16 21:36, Andrew F. Davis wrote:
>> Locking the two gain stages to the same setting adds no value for us,
>> so initialize them as unlocked and remove the sysfs for unlocking them.
>> This also allows us to greatly simplify showing and sett
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