> On Mar 8, 2021, at 10:31 AM, Luck, Tony wrote:
>
>
>>
>> Can you point me at that SIGBUS code in a current kernel?
>
> It is in kill_me_maybe(). mce_vaddr is setup when we disassemble whatever
> get_user()
> or copy from user variant was in use in the kernel when the poison memory was
On Tue, 02 Mar 2021 14:42:35 +, Paul Cercueil wrote:
> Add documentation for the devicetree bindings of the RDA5807 FM radio
> I2C chip from Unisoc.
>
> Signed-off-by: Paul Cercueil
> ---
> .../bindings/media/i2c/rda,rda5807.yaml | 67 +++
> 1 file changed, 67 insertion
On 3/3/21 10:16 PM, Alistair Popple wrote:
Migration is currently implemented as a mode of operation for
try_to_unmap_one() generally specified by passing the TTU_MIGRATION flag
or in the case of splitting a huge anonymous page TTU_SPLIT_FREEZE.
However it does not have much in common with the
Adjust the rss_stat tracepoint to print the name of the resident page type
that got updated(e.g. MM_ANONPAGES/MM_FILEPAGES), rather than the numeric
index corresponding to it(the __entry->member value):
Before this patch:
--
rss_stat: mm_id=1216113068 curr=0 member=1 size=28672B
rs
Or maybe it is better to just do this as LCPU.
Really performance is getting the most of the bus.
With LCPU, one could do a more highlevel like low-level.
JSR with arguments etc.
Serenity.
On Mon, Mar 08, 2021 at 09:13:55AM +, David Howells wrote:
> Amir Goldstein wrote:
> > With ->fiemap() you can at least make the distinction between a non existing
> > and an UNWRITTEN extent.
>
> I can't use that for XFS, Ext4 or btrfs, I suspect. Christoph and Dave's
> assertion is that th
>> So it should be safe to grab and hold a mutex. See patch below.
>
> The mutex approach looks simpler and safer, so I'm fine with it.
Thanks. Is that an "Acked-by:"?
>> /**
>> * memory_failure - Handle memory failure of a page.
>> * @pfn: Page Number of the corrupted page
>> @@ -1424,12
On 2/25/21 2:47 PM, Sean Christopherson wrote:
> Introduce MMU_PRESENT to explicitly track which SPTEs are "present" from
> the MMU's perspective. Checking for shadow-present SPTEs is a very
> common operation for the MMU, particularly in hot paths such as page
> faults. With the addition of "rem
On Mon, Mar 08, 2021 at 07:32:47PM +0100, Rafael J. Wysocki wrote:
> On Thu, Mar 4, 2021 at 4:02 PM Andy Shevchenko
> wrote:
> >
> > When IRQ domain is created for an ACPI case, the name of it becomes
> > unknown-%d
> > since for now it utilizes of_node member only and doesn't consider fwnode
>
On Mon, Mar 08, 2021 at 02:20:16PM +0200, Andy Shevchenko wrote:
> From: Jonathan Yong
>
> There is already one and at least one more user is coming which
> requires an access to Primary to Sideband bridge (P2SB) in order to
> get IO or MMIO bar hidden by BIOS. Create a library to access P2SB
> f
On Mon, 8 Mar 2021 19:40:51 +0100 Loic Poulain wrote:
> The MHI WWWAN control driver allows MHI Qcom based modems to expose
> different modem control protocols to userspace, so that userspace
> modem tools or daemon (e.g. ModemManager) can control WWAN config
> and state (APN config, SMS, provider
The current driver is not handling the clock enable/disable operations
properly. The clocks need to be handled correctly by enabling or
disabling at appropriate places. This patch adds code to handle the
same.
Signed-off-by: Manish Narani
---
drivers/phy/xilinx/phy-zynqmp.c | 40
The new AE-5 Plus model has a different Subsystem ID compared to the
non-plus model. Adding the new id to the list of quirks.
Signed-off-by: Simeon Simeonoff
---
sound/pci/hda/patch_ca0132.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/sound/pci/hda/patch_ca0132.c b/sound/pci/hda/patch_c
On Thu, Mar 04, 2021 at 10:42:59AM -0800, Dave Hansen wrote:
> On 3/1/21 12:32 AM, Oscar Salvador wrote:
> > We never get to allocate 1GB pages when mapping the vmemmap range.
> > Drop the dead code both for the aligned and unaligned cases and leave
> > only the direct map handling.
>
> Could you
Add documentation for the user-space interface of the Surface DTX
(detachment system) driver, used on Microsoft Surface Book series
devices.
Signed-off-by: Maximilian Luz
---
.../surface_aggregator/clients/dtx.rst| 718 ++
.../surface_aggregator/clients/index.rst |
The Microsoft Surface Book series devices consist of a so-called
clipboard part (containing the CPU, touchscreen, and primary battery)
and a base part (containing keyboard, secondary battery, and optional
discrete GPU). These parts can be separated, i.e. the clipboard can be
detached and used as ta
The Microsoft Surface Book series devices consist of a so-called
clipboard part (containing the CPU, touchscreen, and primary battery)
and a base part (containing keyboard, secondary battery, and optional
discrete GPU). These parts can be separated, i.e. the clipboard can be
detached and used as ta
Add support for native SSAM devices to the DTX driver. This allows
support for the Surface Book 3, on which the DTX device is not present
in ACPI.
Signed-off-by: Maximilian Luz
---
drivers/platform/surface/Kconfig | 4 ++
drivers/platform/surface/surface_dtx.c | 90 +++
Hi Al,
I love your patch! Perhaps something to improve:
[auto build test WARNING on tty/tty-testing]
[also build test WARNING on linux/master robh/for-next usb/usb-testing
linus/master v5.12-rc2 next-20210305]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submi
While LTO with KASAN is normally not useful, hardware tag-based KASAN
can be used also in production kernels with ARM64_MTE. Therefore, allow
KASAN_HW_TAGS to be selected together with HAS_LTO_CLANG.
Reported-by: Alistair Delva
Signed-off-by: Sami Tolvanen
---
arch/Kconfig | 2 +-
1 file change
+ the rest of cc back and move your reply inline.
On 8 Mar 2021, at 12:47, Mika Penttilä wrote:
>>
>>
>> On 8.3.2021 17.22, Zi Yan wrote:
>>> From: Zi Yan
>>>
>>> By writing ",," to
>>> /split_huge_pages_in_range_pid, THPs in the process with the
>>> given pid and virtual address range are split.
On Tue, Mar 02, 2021 at 12:28:45PM +0200, Claudiu Beznea wrote:
> Add DT bindings for Microchip External Interrupt Controller.
>
> Signed-off-by: Claudiu Beznea
> ---
> .../interrupt-controller/mchp,eic.yaml| 74 +++
> 1 file changed, 74 insertions(+)
> create mode 10064
From: Nicolas Ferre
Fix the whole mux-mask table according to datasheet for the sam9x60
product. Too much functions for pins were disabled leading to
misunderstandings when enabling more peripherals or taking this table
as an example for another board.
Signed-off-by: Nicolas Ferre
Fixes: 1e5f5
On Mon, Mar 08, 2021 at 07:40:51PM +0100, Loic Poulain wrote:
> --- /dev/null
> +++ b/drivers/bus/mhi/wwan_ctrl.c
> @@ -0,0 +1,559 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.*/
It's 2021 now :)
On Tue, 02 Mar 2021 17:16:38 +0800, Yang Li wrote:
> This patch removes unneeded return variables, using only
> '0' instead.
> It fixes the following warning detected by coccinelle:
> ./drivers/of/property.c:1371:5-8: Unneeded variable: "ret". Return "0"
> on line 1388
>
> Reported-by: Abaci Robot
On Thu, Mar 04, 2021 at 09:02:36AM -0800, Dave Hansen wrote:
> On 3/1/21 12:32 AM, Oscar Salvador wrote:
> > When the size of a struct page is not multiple of 2MB, sections do
> > not span a PMD anymore and so when populating them some parts of the
> > PMD will remain unused.
>
> Multiples of 2MB
On Tue, Mar 02, 2021 at 08:44:04AM +0100, Rafał Miłecki wrote:
> From: Rafał Miłecki
>
> NVRAM structure contains device data and can be accessed using MMIO.
>
> Signed-off-by: Rafał Miłecki
> ---
> .../bindings/firmware/brcm,nvram.yaml | 41 +++
> 1 file changed, 41 in
On Mon, Mar 08, 2021 at 05:10:23PM +0100, Andrey Konovalov wrote:
> When CONFIG_DEBUG_VIRTUAL is enabled, the default page_to_virt() macro
> implementation from include/linux/mm.h is used. That definition doesn't
> account for KASAN tags, which leads to no tags on page_alloc allocations.
>
> Provi
This controller is present on BCM6318, BCM6328, BCM6362, BCM6368 and BCM63268
SoCs.
Signed-off-by: Álvaro Fernández Rojas
---
drivers/net/mdio/Kconfig| 11 ++
drivers/net/mdio/Makefile | 1 +
drivers/net/mdio/mdio-mux-bcm6368.c | 179
3 files
This controller is present on BCM6318, BCM6328, BCM6362, BCM6368 and BCM63268
SoCs.
Álvaro Fernández Rojas (2):
dt-bindings: net: Add bcm6368-mdio-mux bindings
net: mdio: Add BCM6368 MDIO mux bus controller
.../bindings/net/brcm,bcm6368-mdio-mux.yaml | 79
drivers/net/mdio/Kconfi
Add documentations for bcm6368 mdio mux driver.
Signed-off-by: Álvaro Fernández Rojas
---
.../bindings/net/brcm,bcm6368-mdio-mux.yaml | 79 +++
1 file changed, 79 insertions(+)
create mode 100644
Documentation/devicetree/bindings/net/brcm,bcm6368-mdio-mux.yaml
diff --git a/D
On Tue, 02 Mar 2021 11:18:11 +0530, Rajendra Nayak wrote:
> Add compatible and constants for the power domains exposed by the RPMH
> in the Qualcomm Technologies Inc sc7280 platform.
>
> Signed-off-by: Rajendra Nayak
> ---
> Documentation/devicetree/bindings/power/qcom,rpmpd.yaml | 1 +
> inclu
Add support for Intel's eASIC N5X platform in the arm64 defconfig.
Signed-off-by: Dinh Nguyen
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index d612f633b771..f1fffade222e 100644
--- a/arch/arm64/
On 3/3/21 10:16 PM, Alistair Popple wrote:
The behaviour of try_to_unmap_one() is difficult to follow because it
performs different operations based on a fairly large set of flags used
in different combinations.
TTU_MUNLOCK is one such flag. However it is exclusively used by
try_to_munlock() w
On Tue, 02 Mar 2021 11:47:38 +0800, Henry Chen wrote:
> Add interconnect provider dt-bindings for MT6873.
>
> Signed-off-by: Henry Chen
> ---
> include/dt-bindings/interconnect/mtk,mt6873-emi.h | 41
> +++
> 1 file changed, 41 insertions(+)
> create mode 100644 include/dt-b
On Tue, 02 Mar 2021 11:47:32 +0800, Henry Chen wrote:
> Document the binding for enabling dvfsrc on MediaTek SoC.
>
> Signed-off-by: Henry Chen
> ---
> .../devicetree/bindings/soc/mediatek/dvfsrc.yaml | 67
> ++
> include/dt-bindings/interconnect/mtk,mt8183-emi.h | 21 +++
On Wed, Mar 03, 2021 at 06:30:34PM +0100, Martin Wilck wrote:
> I wonder if it wouldn't be wiser to remove this code
>
> if (disk->flags & GENHD_FL_HIDDEN) {
> dev_set_uevent_suppress(ddev, 0);
> return;
> }
>
> from register_disk(). The way you did
On Tue, Mar 02, 2021 at 05:21:23PM +0100, Linus Walleij wrote:
> On Tue, Mar 2, 2021 at 2:18 AM Alexander Sverdlin
> wrote:
>
> > Currently the naming of the GPIO chips depends on their order in the DT,
> > but also on the kernel version (I've noticed the change from v5.10.x to
> > v5.11). Honor
On Mon, Mar 08, 2021 at 07:23:34PM +0100, Marco Elver wrote:
> On Mon, 8 Mar 2021 at 18:23, Petr Mladek wrote:
> > -
> > pr_warn("**\n");
> > - pr_warn("** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE
> > **\n");
> > -
Hi Florian,
El 08/03/2021 a las 19:29, Florian Fainelli escribió:
On 3/8/21 10:07 AM, Álvaro Fernández Rojas wrote:
Add device tree support to b53_mmap.c while keeping platform devices support.
Signed-off-by: Álvaro Fernández Rojas
---
drivers/net/dsa/b53/b53_mmap.c | 36 +++
On Thu, Mar 4, 2021 at 4:02 PM Andy Shevchenko
wrote:
>
> When IRQ domain is created for an ACPI case, the name of it becomes unknown-%d
> since for now it utilizes of_node member only and doesn't consider fwnode
> case.
> Convert IRQ domain creation code to utilize fwnode instead.
>
> Before/Aft
The MHI WWWAN control driver allows MHI Qcom based modems to expose
different modem control protocols to userspace, so that userspace
modem tools or daemon (e.g. ModemManager) can control WWAN config
and state (APN config, SMS, provider selection...). A Qcom based
modem can expose one or several of
On 3/7/21 8:37 PM, Sudeep Holla wrote:
On Wed, Mar 03, 2021 at 10:08:10PM -0800, Sowjanya Komatineni wrote:
This patch adds cpu-idle-states and corresponding state nodes to
Tegra194 CPU in dt-binding document
I see that this platform has PSCI support. Can you care to explain why
you need add
> Can you point me at that SIGBUS code in a current kernel?
It is in kill_me_maybe(). mce_vaddr is setup when we disassemble whatever
get_user()
or copy from user variant was in use in the kernel when the poison memory was
consumed.
if (p->mce_vaddr != (void __user *)-1l) {
On Mon, Mar 08, 2021 at 01:28:43PM +0100, Juergen Gross wrote:
> diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
> index 36cd71fa097f..04b3067f31b5 100644
> --- a/arch/x86/include/asm/paravirt.h
> +++ b/arch/x86/include/asm/paravirt.h
> @@ -137,7 +137,8 @@ static inli
On 3/3/21 10:16 PM, Alistair Popple wrote:
Both migration and device private pages use special swap entries that
are manipluated by a range of inline functions. The arguments to these
are somewhat inconsitent so rework them to remove flag type arguments
and to make the arguments similar for bot
On 3/8/21 10:07 AM, Álvaro Fernández Rojas wrote:
> Add device tree support to b53_mmap.c while keeping platform devices support.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> drivers/net/dsa/b53/b53_mmap.c | 36 ++
> 1 file changed, 36 insertions(+)
>
> diff
On Mon, Mar 08, 2021 at 02:35:30PM +0800, Yang Li wrote:
> This function always return '0' and no callers use the return value.
> So make it a void function.
>
> This eliminates the following coccicheck warning:
> ./drivers/usb/typec/tcpm/tcpm.c:778:5-8: Unneeded variable: "ret".
> Return "0" on l
On Mon, 01 Mar 2021 19:09:05 +0200, Codrin Ciubotariu wrote:
> This patch converts the Microchip I2SMCC bindings to DT schema format
> using json-schema.
>
> Signed-off-by: Codrin Ciubotariu
> ---
>
> Changes in v2:
> - moved from the beginning to the end of the patch series;
> - includes the ch
On Wed, Mar 03, 2021 at 11:09:31PM -0800, Badhri Jagan Sridharan wrote:
> While interpreting CC_STATUS, ROLE_CONTROL has to be read to make
> sure that CC1/CC2 is not forced presenting Rp/Rd.
>
> From the TCPCI spec:
>
> 4.4.5.2 ROLE_CONTROL (Normative):
> The TCPM shall write B6 (DRP) = 0b and B
On Mon, 01 Mar 2021 16:17:51 +0100, Benjamin Gaignard wrote:
> Document IMX8MQ VPU bindings to add the phandle to the reset driver.
>
> Provide an independent reset driver allow to the both VPUs to share
> their control/reset hardware block. The reset driver replace what
> was previously done be u
On Mon, Mar 08, 2021 at 11:22:17AM -0700, Rob Herring wrote:
> On Mon, Mar 01, 2021 at 04:17:49PM +0100, Benjamin Gaignard wrote:
> > The two VPUs inside IMX8MQ share the same control block which can be see
> > as a reset hardware block.
> > In order to be able to add the second VPU (for HECV decod
On 3/8/21 10:20 AM, Oscar Salvador wrote:
> On Thu, Mar 04, 2021 at 07:50:10AM -0800, Dave Hansen wrote:
>> On 3/1/21 12:32 AM, Oscar Salvador wrote:
>>> remove_pte_table() is prepared to handle the case where either the
>>> start or the end of the range is not PAGE aligned.
>>> This cannot actuall
On 3/8/21 10:08 AM, Álvaro Fernández Rojas wrote:
> BCM63xx switches are present on bcm63xx and bmips devices.
>
> Signed-off-by: Álvaro Fernández Rojas
Acked-by: Florian Fainelli
Since you are targeting net-next, please make it clear in the patch
subject next time:
https://git.kernel.org/pub
On 02/03/2021 at 11:28, Claudiu Beznea wrote:
Add DT bindings for Microchip External Interrupt Controller.
Signed-off-by: Claudiu Beznea
---
.../interrupt-controller/mchp,eic.yaml| 74 +++
Nitpicking: use full vendor name in binding file name: microchip,eic.yaml
1
On 3/3/21 10:16 PM, Alistair Popple wrote:
Remove the migration and device private entry_to_page() and
entry_to_pfn() inline functions and instead open code them directly.
This results in shorter code which is easier to understand.
Signed-off-by: Alistair Popple
Looks OK to me.
Reviewed-by:
On Mon, Mar 01, 2021 at 04:17:50PM +0100, Benjamin Gaignard wrote:
> Document bindings for IMX8MQ VPU reset hardware block
>
> Signed-off-by: Benjamin Gaignard
> ---
> .../bindings/reset/fsl,imx8mq-vpu-reset.yaml | 54 +++
> include/dt-bindings/reset/imx8mq-vpu-reset.h | 16 +++
The Stratix 10 / Agilex / N5X clocks do not use anything other than OF
or COMMON_CLK so they should be compile testable on most of the
platforms.
Signed-off-by: Krzysztof Kozlowski
---
drivers/clk/Makefile| 5 +
drivers/clk/socfpga/Kconfig | 22 --
2 files change
The Intel's eASIC N5X (ARCH_N5X) architecture shares a lot with Agilex
(ARCH_AGILEX) so it uses the same socfpga_agilex.dtsi, with minor
changes. Also the clock drivers are the same.
However the clock drivers won't be build without ARCH_AGILEX. One could
assume that ARCH_N5X simply depends on AR
Three clock drivers are used by Stratix 10, Agilex and N5X, so use
separate dedicated Kconfig entry to get rid of duplicated Makefile
lines. This will also allow later compile testing.
Signed-off-by: Krzysztof Kozlowski
---
drivers/clk/socfpga/Kconfig | 7 +++
drivers/clk/socfpga/Makefile
Hi,
A fix, cleanup and finally compile testing for SoCFPGA clock drivers.
I don't expect any functional impact, however please test on real
hardware.
I tested compile builds on few configuratins, so I hope kbuild 0-day
will check more options (please give it few days on the lists).
Best regards,
On Mon, 8 Mar 2021 at 18:23, Petr Mladek wrote:
[...]
> > I'm actually concerned about both. Platforms (and boot loaders) may
> > have limitations for kernel image size, too.
> > Static memory consumption is also more easily measured, so I tend
> > to run bloat-o-meter, and dive into anything tha
On 2021-03-08 5:31 PM, Arnd Bergmann wrote:
From: Arnd Bergmann
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c:1510:12: error:
implicit declaration of function 'fib_info_nh'
[-Werror,-Wimplicit-function-declaration]
fib_dev = fib_info_nh(fen_info->fi, 0)->fib_nh_dev;
On Mon, Mar 01, 2021 at 04:17:49PM +0100, Benjamin Gaignard wrote:
> The two VPUs inside IMX8MQ share the same control block which can be see
> as a reset hardware block.
> In order to be able to add the second VPU (for HECV decoding) it will be
> more handy if the both VPU drivers instance don't h
On Thu, Mar 4, 2021 at 9:13 PM Andy Shevchenko
wrote:
>
> GPIO library uses of_node and fwnode in the core in non-unified way.
> The series cleans this up and improves IRQ domain creation for non-OF cases
> where currently the names of the domain are 'unknown'.
>
> This has been tested on Intel Ga
Hello,
syzbot found the following issue on:
HEAD commit:d310ec03 Merge tag 'perf-core-2021-02-17' of git://git.ker..
git tree: net-next
console output: https://syzkaller.appspot.com/x/log.txt?x=147866a2d0
kernel config: https://syzkaller.appspot.com/x/.config?x=e681d54870713a40
das
On 3/8/21 1:24 AM, Thomas Bogendoerfer wrote:
> BMIPS is one of the few platforms that do change the exception base.
> After commit 2dcb39645441 ("memblock: do not start bottom-up allocations
> with kernel_end") we started seeing BMIPS boards fail to boot with the
> built-in FDT being corrupted.
>
On Thu, Mar 04, 2021 at 07:50:10AM -0800, Dave Hansen wrote:
> On 3/1/21 12:32 AM, Oscar Salvador wrote:
> > remove_pte_table() is prepared to handle the case where either the
> > start or the end of the range is not PAGE aligned.
> > This cannot actually happen:
> >
> > __populate_section_memmap
I have this emulated device in QEMU,
-- and I agree with you that probably no one has been using it for a while
IMHO, given the quality of the driver it also make sense to drop the
support completely
or we at least need to fix some obvious issues here.
Best,
- Tong
On Mon, Mar 8, 2021 at 1:06 PM A
Add initial DTS for the Snapdragon 888 Mobile Hardware Development Kit,
aka SM8350 HDK. This initial version describes debug UART, UFS storage,
the three USB connectors and remoteprocs.
Reviewed-by: Konrad Dybcio
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Added 'regulator-allow-set-
On Mon 08 Mar 10:48 CST 2021, Vinod Koul wrote:
> Add support for the PM8350, PM8350B, PM8350C, PMK8350, PMR735A and
> PMR735B GPIO support to the Qualcomm PMIC GPIO binding.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Vinod Koul
> ---
> .../devicetree/bindings/pinctrl/qc
On Mon 08 Mar 10:48 CST 2021, Vinod Koul wrote:
> Add support for the PM8350, PM8350B, PM8350C, PMK8350, PMR735A and
> PMR735B GPIO support to the Qualcomm PMIC GPIO driver.
>
Acked-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Vinod Koul
> ---
> drivers/pinctrl/qcom/pinctrl-spmi-gpio
On Mon, 8 Mar 2021 16:57:29 +0200
"Yordan Karadzhov (VMware)" wrote:
> > If we had:
> >
> > <...>-37 [004] ...1 2022.303820: gc_worker
> > <-process_one_work
> > <...>-37 [004] ...1 2022.303820: ___might_sleep
> > <-gc_worker
> > <...>-37 [0
On Mon, Mar 8, 2021 at 6:54 AM Paul E. McKenney wrote:
>
> On Sun, Mar 07, 2021 at 10:13:04PM -0800, Shakeel Butt wrote:
> > On Tue, Feb 16, 2021 at 4:13 PM Yang Shi wrote:
> > >
> > > Using kvfree_rcu() to free the old shrinker_maps instead of call_rcu().
> > > We don't have to define a dedicate
On Mon, Mar 08, 2021 at 05:20:53PM +0530, Viresh Kumar wrote:
> On 05-03-21, 13:55, Beata Michalska wrote:
> > Actually, that one might be problematic: by the time the
> > _opp_table_kref_release is being reached, the opp pointed to
> > by current_opp may no longer be valid.
> > _opp_remove_all_sta
> On Mar 8, 2021, at 1:49 AM, Aili Yao wrote:
>
> On Sun, 7 Mar 2021 11:16:24 -0800
> Andy Lutomirski wrote:
>
>>> Some programs may use read(2), write(2), etc as ways to check if
>>> memory is valid without getting a signal. They might not want
>>> signals, which means that thi
Hi Jean,
On 3/5/21 11:45 AM, Jean-Philippe Brucker wrote:
> Hi,
>
> On Tue, Feb 23, 2021 at 10:06:15PM +0100, Eric Auger wrote:
>> This patch adds the VFIO_IOMMU_SET_MSI_BINDING ioctl which aim
>> to (un)register the guest MSI binding to the host. This latter
>> then can use those stage 1 binding
On Mon, Mar 8, 2021 at 11:43 AM David Ahern wrote:
>
> On 3/8/21 9:26 AM, Balazs Nemeth wrote:
> > On Mon, 2021-03-08 at 09:17 -0700, David Ahern wrote:
> >> On 3/8/21 9:07 AM, Willem de Bruijn wrote:
> diff --git a/net/mpls/mpls_gso.c b/net/mpls/mpls_gso.c
> index b1690149b6fa..cc1b6457
On Mon, 2021-03-08 at 18:02 +, Limonciello, Mario wrote:
>
>
> > -Original Message-
> > From: Rajneesh Bhardwaj
> > Sent: Monday, March 8, 2021 11:32
> > To: Limonciello, Mario
> > Cc: David E. Box; hdego...@redhat.com; mgr...@linux.intel.com;
> > sasha.nef...@intel.com; platform-dri
On 08.03.21 18:49, Zi Yan wrote:
On 8 Mar 2021, at 11:17, David Hildenbrand wrote:
On 08.03.21 16:22, Zi Yan wrote:
From: Zi Yan
By writing ",," to
/split_huge_pages_in_range_pid, THPs in the process with the
given pid and virtual address range are split. It is used to test
split_huge_page f
On Mon, Mar 08, 2021 at 04:14:31PM +, Vincenzo Frascino wrote:
> load_unaligned_zeropad() and __get/put_kernel_nofault() functions can
> read passed some buffer limits which may include some MTE granule with a
> different tag.
s/passed/past/
> When MTE async mode is enable, the load operation
BCM63xx switches are present on bcm63xx and bmips devices.
Signed-off-by: Álvaro Fernández Rojas
---
drivers/net/dsa/b53/b53_priv.h | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/net/dsa/b53/b53_priv.h b/drivers/net/dsa/b53/b53_priv.h
index 8419bb7f4505..82700a5714c1 100644
--- a
Add device tree support to b53_mmap.c while keeping platform devices support.
Signed-off-by: Álvaro Fernández Rojas
---
drivers/net/dsa/b53/b53_mmap.c | 36 ++
1 file changed, 36 insertions(+)
diff --git a/drivers/net/dsa/b53/b53_mmap.c b/drivers/net/dsa/b53/b53_
Hi Tong,
Is this direct-assigned hardware or is QEMU being used to emulate the
hardware here? Admittedly I don't know that much about ATM, so I am
not sure when/if those phys would have gone out of production. However
since the code dates back to 2005 I am guessing it is on the old side.
Ultimate
On Mon, Mar 8, 2021 at 12:54 PM Christian König
wrote:
>
> Am 08.03.21 um 18:06 schrieb Kalesh Singh:
> > Android captures per-process system memory state when certain low memory
> > events (e.g a foreground app kill) occur, to identify potential memory
> > hoggers. In order to measure how much me
> -Original Message-
> From: Rajneesh Bhardwaj
> Sent: Monday, March 8, 2021 11:32
> To: Limonciello, Mario
> Cc: David E. Box; hdego...@redhat.com; mgr...@linux.intel.com;
> sasha.nef...@intel.com; platform-driver-...@vger.kernel.org; linux-
> ker...@vger.kernel.org; intel-wired-...@lis
On Mon, Mar 8, 2021 at 3:34 AM ruansy.f...@fujitsu.com
wrote:
> > > > > 1 file changed, 8 insertions(+)
> > > > >
> > > > > diff --git a/include/linux/memremap.h b/include/linux/memremap.h
> > > > > index 79c49e7f5c30..0bcf2b1e20bd 100644
> > > > > --- a/include/linux/memremap.h
> > > > > +++ b/i
On Fri, Mar 05, 2021 at 10:54:58AM +0530, Anshuman Khandual wrote:
> There are multiple instances of pfn_to_section_nr() and __pfn_to_section()
> when CONFIG_SPARSEMEM is enabled. This can be optimized if memory section
> is fetched earlier. This replaces the open coded PFN and ADDR conversion
> wi
Hello,
syzbot found the following issue on:
HEAD commit:4641b323 Add linux-next specific files for 20210305
git tree: linux-next
console output: https://syzkaller.appspot.com/x/log.txt?x=12584542d0
kernel config: https://syzkaller.appspot.com/x/.config?x=b87b6a083d302a90
dashboard
On Fri, Mar 05, 2021 at 10:54:57AM +0530, Anshuman Khandual wrote:
> pfn_valid() validates a pfn but basically it checks for a valid struct page
> backing for that pfn. It should always return positive for memory ranges
> backed with struct page mapping. But currently pfn_valid() fails for all
> ZO
On Mon, Mar 08, 2021 at 02:37:40PM +, Michael Kelley wrote:
> From: Melanie Plageman (Microsoft) Sent: Friday,
> March 5, 2021 3:22 PM
> >
> > The scsi_device->queue_depth is set to Scsi_Host->cmd_per_lun during
> > allocation.
> >
> > Cap cmd_per_lun at can_queue to avoid dispatch errors.
Hi Alex,
attached is the kernel log for zatm(uPD98402) -- I also have
idt77252's log -- which is similar to this one --
I think it makes sense to drop if no one is actually using it --
- Tong
[5.740774] BUG: KASAN: null-ptr-deref in uPD98402_start+0x5e/0x219
[uPD98402]
[5.741179] Write of
Am 08.03.21 um 18:06 schrieb Kalesh Singh:
Android captures per-process system memory state when certain low memory
events (e.g a foreground app kill) occur, to identify potential memory
hoggers. In order to measure how much memory a process actually consumes,
it is necessary to include the DMA b
ail.com/
Thanks!
I've folded that in, with the series rebased to v5.12-rc2, tagged as
arm64-fiq-20210308. I'm expecting that Marc will get the first couple of
patches queued by rc4, so there's at least one rebase ahead.
Mark.
On Sat 06 Mar 04:34 CST 2021, Konrad Dybcio wrote:
> Hi!
>
>
> > + vreg_l5b_0p88: ldo5 {
> > + regulator-name = "vreg_l5b_0p88";
> > + regulator-min-microvolt = <88>;
> > + regulator-max-microvolt = <888000>;
> > +
On Mon, 22 Feb 2021 16:53:08 +0530, Kishon Vijay Abraham I wrote:
> AM64 has a single lane SERDES which can be configured to be used
> with either PCIe or USB. Define the possilbe values for the SERDES
> function in AM64 SoC here.
>
> Signed-off-by: Kishon Vijay Abraham I
> Acked-by: Peter Rosin
On Mon, 22 Feb 2021 16:53:07 +0530, Kishon Vijay Abraham I wrote:
> Add binding for refclk driver used to route the refclk out of torrent
> SERDES.
>
> Signed-off-by: Kishon Vijay Abraham I
> ---
> .../bindings/phy/phy-cadence-torrent.yaml | 20 ---
> include/dt-bindings/phy/
On 3/8/21 4:30 AM, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.10.22 release.
> There are 42 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses should
On Mon, Feb 22, 2021 at 04:53:06PM +0530, Kishon Vijay Abraham I wrote:
> Add bindings for AM64 SERDES Wrapper.
>
> Signed-off-by: Kishon Vijay Abraham I
> ---
> .../bindings/phy/ti,phy-j721e-wiz.yaml| 10 ++---
> include/dt-bindings/phy/phy-ti.h | 21 +++
On 8 Mar 2021, at 11:17, David Hildenbrand wrote:
> On 08.03.21 16:22, Zi Yan wrote:
>> From: Zi Yan
>>
>> By writing ",," to
>> /split_huge_pages_in_range_pid, THPs in the process with the
>> given pid and virtual address range are split. It is used to test
>> split_huge_page function. In additi
601 - 700 of 1525 matches
Mail list logo
