* Andi Kleen <[EMAIL PROTECTED]> wrote:
> The ACPI code currently disables TSC use in any C2 and C3 states. But
> the AMD Fam10h BKDG documents that the TSC will never stop in any C
> states when the CONSTANT_TSC bit is set. Make this disabling
> conditional on CONSTANT_TSC not set on AMD.
>
* Andi Kleen [EMAIL PROTECTED] wrote:
The ACPI code currently disables TSC use in any C2 and C3 states. But
the AMD Fam10h BKDG documents that the TSC will never stop in any C
states when the CONSTANT_TSC bit is set. Make this disabling
conditional on CONSTANT_TSC not set on AMD.
I
The ACPI code currently disables TSC use in any C2 and C3
states. But the AMD Fam10h BKDG documents that the TSC
will never stop in any C states when the CONSTANT_TSC bit is
set. Make this disabling conditional on CONSTANT_TSC
not set on AMD.
I actually think this is true on Intel too for C2
The ACPI code currently disables TSC use in any C2 and C3
states. But the AMD Fam10h BKDG documents that the TSC
will never stop in any C states when the CONSTANT_TSC bit is
set. Make this disabling conditional on CONSTANT_TSC
not set on AMD.
I actually think this is true on Intel too for C2
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