Re: [PATCH] UV: fix incorrect tlb flush all issue

2012-09-26 Thread Andrew Morton
On Tue, 25 Sep 2012 07:34:52 -0500 Cliff Wickman wrote: > From: Cliff Wickman > > (this was sent as an ack on 9/13, but with incorrect title and sign-off) > > Ack. > But with the adjustment below. The 'end' argument was not declared long. > > I tested the patch on a UV. > It has the effect o

Re: [PATCH] UV: fix incorrect tlb flush all issue

2012-09-26 Thread Ingo Molnar
* Cliff Wickman wrote: > From: Cliff Wickman > > (this was sent as an ack on 9/13, but with incorrect title and sign-off) > > Ack. > But with the adjustment below. The 'end' argument was not declared long. > > I tested the patch on a UV. > It has the effect of either clearing 1 or all TLBs

[PATCH] UV: fix incorrect tlb flush all issue

2012-09-25 Thread Cliff Wickman
From: Cliff Wickman (this was sent as an ack on 9/13, but with incorrect title and sign-off) Ack. But with the adjustment below. The 'end' argument was not declared long. I tested the patch on a UV. It has the effect of either clearing 1 or all TLBs in a cpu. I added some debugging to test for

Re: [alex....@intel.com: Re: [PATCH] UV: fix incorrect tlb flush all issue]

2012-09-13 Thread Ingo Molnar
* Cliff Wickman wrote: > On Thu, Sep 13, 2012 at 05:53:10PM +0200, Ingo Molnar wrote: > > > > Ack? > > > > Thanks, > > > > Ingo > > Ack. > But with the adjustment below. The 'end' argument was not declared long. Ok, great - mind sending the updated patch properly under a new title (th

Re: [alex....@intel.com: Re: [PATCH] UV: fix incorrect tlb flush all issue]

2012-09-13 Thread Alex Shi
On 09/14/2012 05:20 AM, Cliff Wickman wrote: > On Thu, Sep 13, 2012 at 05:53:10PM +0200, Ingo Molnar wrote: >> >> Ack? >> >> Thanks, >> >> Ingo > > Ack. > But with the adjustment below. The 'end' argument was not declared long. > > I tested the patch on a UV. > It has the effect of either

Re: [alex....@intel.com: Re: [PATCH] UV: fix incorrect tlb flush all issue]

2012-09-13 Thread Cliff Wickman
On Thu, Sep 13, 2012 at 05:53:10PM +0200, Ingo Molnar wrote: > > Ack? > > Thanks, > > Ingo Ack. But with the adjustment below. The 'end' argument was not declared long. I tested the patch on a UV. It has the effect of either clearing 1 or all TLBs in a cpu. I added some debugging to tes

Re: [PATCH] UV: fix incorrect tlb flush all issue

2012-09-09 Thread Alex Shi
On 09/07/2012 03:10 PM, Jan Beulich wrote: On 07.09.12 at 07:37, Alex Shi wrote: >> @@ -1113,7 +1114,10 @@ const struct cpumask *uv_flush_tlb_others(const >> struct >> cpumask *cpumask, >> >> record_send_statistics(stat, locals, hubs, remotes, bau_desc); >> >> -bau_desc->paylo

Re: [PATCH] UV: fix incorrect tlb flush all issue

2012-09-07 Thread Jan Beulich
>>> On 07.09.12 at 07:37, Alex Shi wrote: > @@ -1113,7 +1114,10 @@ const struct cpumask *uv_flush_tlb_others(const struct > cpumask *cpumask, > > record_send_statistics(stat, locals, hubs, remotes, bau_desc); > > - bau_desc->payload.address = start; > + if (!end) So despite hav

Re: [PATCH] UV: fix incorrect tlb flush all issue

2012-09-06 Thread Alex Shi
On 09/07/2012 07:11 AM, Andrew Morton wrote: > On Fri, 24 Aug 2012 16:57:35 +0800 > Alex Shi wrote: > >> The flush tlb optimization code has logical issue on UV platform. >> It doesn't flush the full range at all, since it simply >> ignores its 'end' parameter (and hence also the "all" indicator

Re: [PATCH] UV: fix incorrect tlb flush all issue

2012-09-06 Thread Andrew Morton
On Fri, 24 Aug 2012 16:57:35 +0800 Alex Shi wrote: > The flush tlb optimization code has logical issue on UV platform. > It doesn't flush the full range at all, since it simply > ignores its 'end' parameter (and hence also the "all" indicator) > in uv_flush_tlb_others() function. > > This patch

[PATCH] UV: fix incorrect tlb flush all issue

2012-08-24 Thread Alex Shi
The flush tlb optimization code has logical issue on UV platform. It doesn't flush the full range at all, since it simply ignores its 'end' parameter (and hence also the "all" indicator) in uv_flush_tlb_others() function. This patch fixed this issue, but untested due to hardware leaking. Reported