Hi Heiko,
在 2016年11月10日 17:21, Heiko Stübner 写道:
Am Donnerstag, 10. November 2016, 10:54:49 schrieb wlf:
Hi Doug,
在 2016年11月10日 04:54, Doug Anderson 写道:
Hi,
On Mon, Nov 7, 2016 at 5:00 AM, William Wu wrote:
We found that the system crashed due to 480MHz output clock
Hi Heiko,
在 2016年11月10日 17:21, Heiko Stübner 写道:
Am Donnerstag, 10. November 2016, 10:54:49 schrieb wlf:
Hi Doug,
在 2016年11月10日 04:54, Doug Anderson 写道:
Hi,
On Mon, Nov 7, 2016 at 5:00 AM, William Wu wrote:
We found that the system crashed due to 480MHz output clock of
USB2 PHY was
Am Donnerstag, 10. November 2016, 10:54:49 schrieb wlf:
> Hi Doug,
>
> 在 2016年11月10日 04:54, Doug Anderson 写道:
> > Hi,
> >
> > On Mon, Nov 7, 2016 at 5:00 AM, William Wu wrote:
> >> We found that the system crashed due to 480MHz output clock of
> >> USB2 PHY was unstable
Am Donnerstag, 10. November 2016, 10:54:49 schrieb wlf:
> Hi Doug,
>
> 在 2016年11月10日 04:54, Doug Anderson 写道:
> > Hi,
> >
> > On Mon, Nov 7, 2016 at 5:00 AM, William Wu wrote:
> >> We found that the system crashed due to 480MHz output clock of
> >> USB2 PHY was unstable after clock had been
Hi Doug,
在 2016年11月10日 04:54, Doug Anderson 写道:
Hi,
On Mon, Nov 7, 2016 at 5:00 AM, William Wu wrote:
We found that the system crashed due to 480MHz output clock of
USB2 PHY was unstable after clock had been enabled by gpu module.
Theoretically, 1 millisecond is a
Hi Doug,
在 2016年11月10日 04:54, Doug Anderson 写道:
Hi,
On Mon, Nov 7, 2016 at 5:00 AM, William Wu wrote:
We found that the system crashed due to 480MHz output clock of
USB2 PHY was unstable after clock had been enabled by gpu module.
Theoretically, 1 millisecond is a critical value for 480MHz
Hi,
On Mon, Nov 7, 2016 at 5:00 AM, William Wu wrote:
> We found that the system crashed due to 480MHz output clock of
> USB2 PHY was unstable after clock had been enabled by gpu module.
>
> Theoretically, 1 millisecond is a critical value for 480MHz
> output clock stable
Hi,
On Mon, Nov 7, 2016 at 5:00 AM, William Wu wrote:
> We found that the system crashed due to 480MHz output clock of
> USB2 PHY was unstable after clock had been enabled by gpu module.
>
> Theoretically, 1 millisecond is a critical value for 480MHz
> output clock stable time, so we try to
We found that the system crashed due to 480MHz output clock of
USB2 PHY was unstable after clock had been enabled by gpu module.
Theoretically, 1 millisecond is a critical value for 480MHz
output clock stable time, so we try to change the delay time
to 1.2 millisecond to avoid this issue.
We found that the system crashed due to 480MHz output clock of
USB2 PHY was unstable after clock had been enabled by gpu module.
Theoretically, 1 millisecond is a critical value for 480MHz
output clock stable time, so we try to change the delay time
to 1.2 millisecond to avoid this issue.
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