Reading the count register clears the interrupt signal. Currently, the
count registers are read into 'regval' variable but the variable is
never used. Therefore remove it.
Signed-off-by: Yash Shah
---
arch/riscv/mm/sifive_l2_cache.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
On Thu, Jun 27, 2019 at 02:04:46PM +0530, Yash Shah wrote:
> Reading the count register clears the interrupt signal. Currently, the
> count registers are read into 'regval' variable but the variable is
> never used. Therefore remove it.
>
> Signed-off-by: Yash Shah
> ---
> arch/riscv/mm/sifive_l
On Thu, 27 Jun 2019, Yash Shah wrote:
> Reading the count register clears the interrupt signal. Currently, the
> count registers are read into 'regval' variable but the variable is
> never used. Therefore remove it.
>
> Signed-off-by: Yash Shah
This is a good start. Could you also add comments
On Thu, Jun 27, 2019 at 9:43 PM Paul Walmsley wrote:
>
> On Thu, 27 Jun 2019, Yash Shah wrote:
>
> > Reading the count register clears the interrupt signal. Currently, the
> > count registers are read into 'regval' variable but the variable is
> > never used. Therefore remove it.
> >
> > Signed-of
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