On Wed, 2017-07-19 at 17:47 -0700, Ed Swierk wrote:
> On all supported platforms, the TS Reading (TSR) field in the
> Temperature (TEMP) register is 9 bits wide. Values above 0x100 (78
> degrees C) are plausible, so don't mask out the topmost bit. And the
> register itself is 16 bits wide, so use
On Wed, 2017-07-19 at 17:47 -0700, Ed Swierk wrote:
> On all supported platforms, the TS Reading (TSR) field in the
> Temperature (TEMP) register is 9 bits wide. Values above 0x100 (78
> degrees C) are plausible, so don't mask out the topmost bit. And the
> register itself is 16 bits wide, so use
On all supported platforms, the TS Reading (TSR) field in the
Temperature (TEMP) register is 9 bits wide. Values above 0x100 (78
degrees C) are plausible, so don't mask out the topmost bit. And the
register itself is 16 bits wide, so use readw() rather than readl().
Signed-off-by: Ed Swierk
On all supported platforms, the TS Reading (TSR) field in the
Temperature (TEMP) register is 9 bits wide. Values above 0x100 (78
degrees C) are plausible, so don't mask out the topmost bit. And the
register itself is 16 bits wide, so use readw() rather than readl().
Signed-off-by: Ed Swierk
---
4 matches
Mail list logo