On 28-05-15 23:48, Michael Turquette wrote:
Hi Mike,
Quoting Mike Looijmans (2014-12-03 23:26:15)
This driver supports the TI CDCE925 programmable clock synthesizer.
The chip contains two PLLs with spread-spectrum clocking support and
five output dividers. The driver only supports the following
Hello,
I was wondering what happened to this patch? Should I resubmit?
Mike.
On 04-12-14 08:26, Mike Looijmans wrote:
This driver supports the TI CDCE925 programmable clock synthesizer.
The chip contains two PLLs with spread-spectrum clocking support and
five output dividers. The driver only s
On 12-01-15 04:04, Mike Turquette wrote:
On Thu, Jan 8, 2015 at 11:01 PM, Mike Looijmans wrote:
Just a ping to inform if you've had had time to look at this?
Its in the queue for review this week. A lot to catch up on after the
holidays. Thanks for the ping.
Just another ping, you haven't
On Thu, Jan 8, 2015 at 11:01 PM, Mike Looijmans wrote:
> Just a ping to inform if you've had had time to look at this?
Its in the queue for review this week. A lot to catch up on after the
holidays. Thanks for the ping.
Regards,
Mike
>
> Mike.
>
> On 12/04/2014 08:26 AM, Mike Looijmans wrote:
>
Just a ping to inform if you've had had time to look at this?
Mike.
On 12/04/2014 08:26 AM, Mike Looijmans wrote:
This driver supports the TI CDCE925 programmable clock synthesizer.
The chip contains two PLLs with spread-spectrum clocking support and
five output dividers. The driver only suppo
Just a ping to ask for attention. Anyone care to review, comment or otherwise
provide some feedback?
On 12/04/2014 08:26 AM, Mike Looijmans wrote:
This driver supports the TI CDCE925 programmable clock synthesizer.
The chip contains two PLLs with spread-spectrum clocking support and
five outp
This driver supports the TI CDCE925 programmable clock synthesizer.
The chip contains two PLLs with spread-spectrum clocking support and
five output dividers. The driver only supports the following setup,
and uses a fixed setting for the output muxes:
Y1 is derived from the input clock
Y2 and Y
7 matches
Mail list logo