On 05/10/17 18:49, Shanker Donthineni wrote:
> Hi Marc,
>
> On 10/05/2017 05:43 AM, Marc Zyngier wrote:
>> On 20/09/17 04:21, Shanker Donthineni wrote:
>>> A new feature Range Selector (RS) has been added to GIC specification
>>> in order to support more than 16 CPUs at affinity level 0. New field
Hi Marc,
On 10/05/2017 05:43 AM, Marc Zyngier wrote:
> On 20/09/17 04:21, Shanker Donthineni wrote:
>> A new feature Range Selector (RS) has been added to GIC specification
>> in order to support more than 16 CPUs at affinity level 0. New fields
>> are introduced in SGI system registers (ICC_SGI0R
On 20/09/17 04:21, Shanker Donthineni wrote:
> A new feature Range Selector (RS) has been added to GIC specification
> in order to support more than 16 CPUs at affinity level 0. New fields
> are introduced in SGI system registers (ICC_SGI0R_EL1, ICC_SGI1R_EL1
> and ICC_ASGI1R_EL1) to relax an artif
A new feature Range Selector (RS) has been added to GIC specification
in order to support more than 16 CPUs at affinity level 0. New fields
are introduced in SGI system registers (ICC_SGI0R_EL1, ICC_SGI1R_EL1
and ICC_ASGI1R_EL1) to relax an artificial limit of 16 at level 0.
- A new RSS field in I
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