Adds L1 data cache refill prefetch, L2 data cache refill prefetch,
and DCZVA instruction events.
Signed-off-by: Shunsuke Nakamura
---
.../perf/pmu-events/arch/arm64/armv8-recommended.json | 18 ++
1 file changed, 18 insertions(+)
diff --git a/tools/perf/pmu-events/arch/arm64/a
Hi,
在 2021/1/21 18:54, Shunsuke Nakamura 写道:
> Adds L1 data cache refill prefetch, L2 data cache refill prefetch,
> and DCZVA instruction events.
A silly question, Does Arm define these events? I checked Arm ARM
document(DDI0487Fc) that these event numbers are reserved. Or maybe
I miss something
On 21/01/2021 11:39, Shaokun Zhang wrote:
Hi,
在 2021/1/21 18:54, Shunsuke Nakamura 写道:
Adds L1 data cache refill prefetch, L2 data cache refill prefetch,
and DCZVA instruction events.
A silly question, Does Arm define these events? I checked Arm ARM
document(DDI0487Fc) that these event number
rnel.org; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH v2 1/3] perf vendor events: Add cache refill and DCZVA
> events
>
> On 21/01/2021 11:39, Shaokun Zhang wrote:
> > Hi,
> >
> > 在 2021/1/21 18:54, Shunsuke Nakamura 写道:
> >> Adds L1 data cac
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