Hi Andrea,
On Tue, Aug 01, 2017 at 09:33:41PM +0200, Andrea Arcangeli wrote:
> Hello,
>
> On Tue, Aug 01, 2017 at 02:56:17PM +0900, Minchan Kim wrote:
> > CPU0CPU1CPU2CPU3
> >
> > Write the same
> > v
On Tue, Aug 01, 2017 at 12:21:41PM -0700, Nadav Amit wrote:
> Minchan Kim wrote:
>
> > Nadav reported KSM can corrupt the user data by the TLB batching race[1].
> > That means data user written can be lost.
> >
> > Quote from Nadav Amit
> > "
> > For this race we need 4 CPUs:
> >
> > CPU0: Cach
Hello,
On Tue, Aug 01, 2017 at 02:56:17PM +0900, Minchan Kim wrote:
> CPU0 CPU1CPU2CPU3
>
> Write the same
> value on page
>
> [cache PTE as
> dirty in TLB]
>
> MADV_FREE
> pte_mkclea
Minchan Kim wrote:
> Nadav reported KSM can corrupt the user data by the TLB batching race[1].
> That means data user written can be lost.
>
> Quote from Nadav Amit
> "
> For this race we need 4 CPUs:
>
> CPU0: Caches a writable and dirty PTE entry, and uses the stale value for
> write later.
>
Nadav reported KSM can corrupt the user data by the TLB batching race[1].
That means data user written can be lost.
Quote from Nadav Amit
"
For this race we need 4 CPUs:
CPU0: Caches a writable and dirty PTE entry, and uses the stale value for
write later.
CPU1: Runs madvise_free on the range th
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