RE: [PATCH v3 09/10] x86/resctrl: Add arch_has_{sparse,empty}_bitmaps to explain CAT differences

2020-05-22 Thread Babu Moger
rse > > Subject: [PATCH v3 09/10] x86/resctrl: Add arch_has_{sparse,empty}_bitmaps to > explain CAT differences > > Intel CPUs expect the cache bitmap provided by user-space to have on > a single span of 1s, whereas AMD can support bitmaps like 0xf00f. > Arm's MPAM support

Re: [PATCH v3 09/10] x86/resctrl: Add arch_has_{sparse,empty}_bitmaps to explain CAT differences

2020-05-19 Thread Reinette Chatre
Hi James, Thank you very much for adding the handling of empty bitmaps. This looks good to me, just one comment ... On 5/18/2020 6:19 AM, James Morse wrote: > -bool cbm_validate_intel(char *buf, u32 *data, struct rdt_resource *r) > +static bool cbm_validate(char *buf, u32 *data, struct rdt_resour

[PATCH v3 09/10] x86/resctrl: Add arch_has_{sparse,empty}_bitmaps to explain CAT differences

2020-05-18 Thread James Morse
Intel CPUs expect the cache bitmap provided by user-space to have on a single span of 1s, whereas AMD can support bitmaps like 0xf00f. Arm's MPAM support also allows sparse bitmaps. Similarly, Intel CPUs check at least one bit set, whereas AMD CPUs are quite happy with an empty bitmap. Arm's MPAM