On Sunday, February 12, 2017 06:13:01 PM Lukas Wunner wrote:
> On Fri, Feb 10, 2017 at 12:39:12PM -0600, Bjorn Helgaas wrote:
> > On Sun, Jan 15, 2017 at 09:03:45PM +0100, Lukas Wunner wrote:
> > > Hotplug ports generally block their parents from suspending to D3hot as
> > > otherwise their interru
On Fri, Feb 10, 2017 at 12:39:12PM -0600, Bjorn Helgaas wrote:
> On Sun, Jan 15, 2017 at 09:03:45PM +0100, Lukas Wunner wrote:
> > Hotplug ports generally block their parents from suspending to D3hot as
> > otherwise their interrupts couldn't be delivered.
>
> This sounds related to PCIe r3.1, sec
On Sun, Jan 15, 2017 at 09:03:45PM +0100, Lukas Wunner wrote:
> Hotplug ports generally block their parents from suspending to D3hot as
> otherwise their interrupts couldn't be delivered.
This sounds related to PCIe r3.1, sec 5.3.1.4, which says functions
supporting PME generation from D3 must sup
On Sun, Jan 15, 2017 at 09:03:45PM +0100, Lukas Wunner wrote:
> Hotplug ports generally block their parents from suspending to D3hot as
> otherwise their interrupts couldn't be delivered.
Well, the hotplug ports don't actually block anything. We may decide
not to suspend the parent because normal
On Sun, Jan 15, 2017 at 09:03:45PM +0100, Lukas Wunner wrote:
> Hotplug ports generally block their parents from suspending to D3hot as
> otherwise their interrupts couldn't be delivered.
>
> An exception are Thunderbolt host controllers: They have a separate
> GPIO pin to side-band signal plug e
Hotplug ports generally block their parents from suspending to D3hot as
otherwise their interrupts couldn't be delivered.
An exception are Thunderbolt host controllers: They have a separate
GPIO pin to side-band signal plug events even if the controller is
powered down or its parent ports are sus
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