From: Thomas Gleixner
The SiS apic bug workaround is now obsolete as we cache the register
values for performance reasons.
Signed-off-by: Thomas Gleixner
Cc: Jiang Liu
Signed-off-by: Jiang Liu
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arch/x86/include/asm/io_apic.h |3 ---
arch/x86/kernel/apic/io_apic.c | 35
From: Thomas Gleixner t...@linutronix.de
The SiS apic bug workaround is now obsolete as we cache the register
values for performance reasons.
Signed-off-by: Thomas Gleixner t...@linutronix.de
Cc: Jiang Liu jiang@linux.intel.com
Signed-off-by: Jiang Liu jiang@linux.intel.com
---
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