Re: [PATCH v2 0/5] PCI: dwc: improve msi handling

2020-10-07 Thread Vidya Sagar
On 10/6/2020 12:06 PM, Jisheng Zhang wrote: External email: Use caution opening links or attachments On Tue, 6 Oct 2020 11:56:34 +0530 Vidya Sagar wrote: Hi, Hi, I would like to verify this series along with the other series "PCI: dwc: fix two MSI issues" on Tegra194. I tried to appl

Re: [PATCH v2 0/5] PCI: dwc: improve msi handling

2020-10-05 Thread Jisheng Zhang
On Tue, 6 Oct 2020 11:56:34 +0530 Vidya Sagar wrote: > > > Hi, Hi, > I would like to verify this series along with the other series "PCI: > dwc: fix two MSI issues" on Tegra194. I tried to apply these series on > both linux-next and Lorenzo's pci/dwc branches but there seem to be non > trivial

Re: [PATCH v2 0/5] PCI: dwc: improve msi handling

2020-10-05 Thread Vidya Sagar
Hi, I would like to verify this series along with the other series "PCI: dwc: fix two MSI issues" on Tegra194. I tried to apply these series on both linux-next and Lorenzo's pci/dwc branches but there seem to be non trivial conflicts. Could you please tell me which branch I can use and apply t

Re: [PATCH v2 0/5] PCI: dwc: improve msi handling

2020-09-29 Thread Marc Zyngier
On 2020-09-29 19:02, Jon Hunter wrote: On 29/09/2020 18:25, Marc Zyngier wrote: On 2020-09-29 14:22, Jon Hunter wrote: Hi Jisheng, On 29/09/2020 11:48, Jisheng Zhang wrote: Hi Jon, On Fri, 25 Sep 2020 09:53:45 +0100 Jon Hunter wrote: On 24/09/2020 12:05, Jisheng Zhang wrote: Improve the

Re: [PATCH v2 0/5] PCI: dwc: improve msi handling

2020-09-29 Thread Jon Hunter
On 29/09/2020 18:25, Marc Zyngier wrote: > On 2020-09-29 14:22, Jon Hunter wrote: >> Hi Jisheng, >> >> On 29/09/2020 11:48, Jisheng Zhang wrote: >>> Hi Jon, >>> >>> On Fri, 25 Sep 2020 09:53:45 +0100 Jon Hunter wrote: >>> On 24/09/2020 12:05, Jisheng Zhang wrote: > Improve the msi c

Re: [PATCH v2 0/5] PCI: dwc: improve msi handling

2020-09-29 Thread Marc Zyngier
On 2020-09-29 14:22, Jon Hunter wrote: Hi Jisheng, On 29/09/2020 11:48, Jisheng Zhang wrote: Hi Jon, On Fri, 25 Sep 2020 09:53:45 +0100 Jon Hunter wrote: On 24/09/2020 12:05, Jisheng Zhang wrote: Improve the msi code: 1. Add proper error handling. 2. Move dw_pcie_msi_init() from each users

Re: [PATCH v2 0/5] PCI: dwc: improve msi handling

2020-09-29 Thread Jon Hunter
Hi Jisheng, On 29/09/2020 11:48, Jisheng Zhang wrote: > Hi Jon, > > On Fri, 25 Sep 2020 09:53:45 +0100 Jon Hunter wrote: > >> >> On 24/09/2020 12:05, Jisheng Zhang wrote: >>> Improve the msi code: >>> 1. Add proper error handling. >>> 2. Move dw_pcie_msi_init() from each users to designware host

Re: [PATCH v2 0/5] PCI: dwc: improve msi handling

2020-09-29 Thread Jisheng Zhang
Hi Jon, On Fri, 25 Sep 2020 09:53:45 +0100 Jon Hunter wrote: > > On 24/09/2020 12:05, Jisheng Zhang wrote: > > Improve the msi code: > > 1. Add proper error handling. > > 2. Move dw_pcie_msi_init() from each users to designware host to solve > > msi page leakage in resume path. > > Apologies

Re: [PATCH v2 0/5] PCI: dwc: improve msi handling

2020-09-28 Thread Jon Hunter
On 27/09/2020 09:28, Jisheng Zhang wrote: ... > I see, the msi_domain_set_affinity() calls parent->chip->irq_set_affinity > without checking, grepping the irqchip and pci dir, I found that > if the MSI is based on some cascaded interrupt mechanism, they all > point the irq_set_affinity to irq_c

Re: [PATCH v2 0/5] PCI: dwc: improve msi handling

2020-09-27 Thread Jisheng Zhang
Hi, On Fri, 25 Sep 2020 16:13:02 +0100 Jon Hunter wrote: > > Hi Jisheng, > > On 25/09/2020 10:27, Jisheng Zhang wrote: > > ... > > >> Could you please try below patch? > >> > >> > >> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c > >> b/drivers/pci/controller/dwc/pcie-designw

Re: [PATCH v2 0/5] PCI: dwc: improve msi handling

2020-09-25 Thread Jon Hunter
Hi Jisheng, On 25/09/2020 10:27, Jisheng Zhang wrote: ... >> Could you please try below patch? >> >> >> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c >> b/drivers/pci/controller/dwc/pcie-designware-host.c >> index bf25d783b5c5..7e5dc54d060e 100644 >> --- a/drivers/pci/controlle

Re: [PATCH v2 0/5] PCI: dwc: improve msi handling

2020-09-25 Thread Jisheng Zhang
On Fri, 25 Sep 2020 17:17:12 +0800 Jisheng Zhang wrote: > CAUTION: Email originated externally, do not click links or open attachments > unless you recognize the sender and know the content is safe. > > > Hi Jon, > > On Fri, 25 Sep 2020 09:53:45 +0100 Jon Hunter wrote: > > > > > > On 24/09/

Re: [PATCH v2 0/5] PCI: dwc: improve msi handling

2020-09-25 Thread Jisheng Zhang
Hi Jon, On Fri, 25 Sep 2020 09:53:45 +0100 Jon Hunter wrote: > > On 24/09/2020 12:05, Jisheng Zhang wrote: > > Improve the msi code: > > 1. Add proper error handling. > > 2. Move dw_pcie_msi_init() from each users to designware host to solve > > msi page leakage in resume path. > > Apologies

Re: [PATCH v2 0/5] PCI: dwc: improve msi handling

2020-09-25 Thread Jon Hunter
On 24/09/2020 12:05, Jisheng Zhang wrote: > Improve the msi code: > 1. Add proper error handling. > 2. Move dw_pcie_msi_init() from each users to designware host to solve > msi page leakage in resume path. Apologies if this is slightly off topic, but I have been meaning to ask about MSIs and PCI

[PATCH v2 0/5] PCI: dwc: improve msi handling

2020-09-24 Thread Jisheng Zhang
Improve the msi code: 1. Add proper error handling. 2. Move dw_pcie_msi_init() from each users to designware host to solve msi page leakage in resume path. Since v1: - add proper error handling patches. - solve the msi page leakage by moving dw_pcie_msi_init() from each users to designware