Re: [PATCH] [16/20] x86: Allow TSC clock source on AMD Fam10h and some cleanup

* Andi Kleen <[EMAIL PROTECTED]> wrote: > After a lot of discussions with AMD it turns out that TSC on Fam10h > CPUs is synchronized when the CONSTANT_TSC cpuid bit is set. Or rather > that if there are ever systems where that is not true it would be > their BIOS' task to disable the bit. >

Re: [PATCH] [16/20] x86: Allow TSC clock source on AMD Fam10h and some cleanup

* Andi Kleen [EMAIL PROTECTED] wrote: After a lot of discussions with AMD it turns out that TSC on Fam10h CPUs is synchronized when the CONSTANT_TSC cpuid bit is set. Or rather that if there are ever systems where that is not true it would be their BIOS' task to disable the bit. So