On Wed, Dec 02, 2015 at 07:28:25PM +, Russell King - ARM Linux wrote:
> The first is easy to solve, and the second by replacing it with dove.h.
> The next problem is this:
>
> arch/arm/plat-orion/common.c:25:30: fatal error: mach/bridge-regs.h: No such
> file or directory
>
> which is imposs
From: Christoffer Dall
The existing code had a troubling TODO statement concerning the fact
that it just did a check if the page that the QEMU backend was going to
read from / write to was there before the call to the QEMU backend and
then relying on the fact that the page stayed around, even in
The interrupt handler, ohci_hcd_at91_overcurrent_irq may be called right
after registration. At that time, pdev->dev.platform_data is not yet set,
leading to a NULL pointer dereference.
Fixes: e4df92279fd9 (USB: host: ohci-at91: merge loops in
ohci_hcd_at91_drv_probe)
Reported-by: Peter Rosin
Te
On Wed, Dec 2, 2015 at 8:05 PM, Brian Norris
wrote:
> + Broadcom list + Kamal
>
> On Tue, Nov 24, 2015 at 08:19:37PM -, Simon Arlott wrote:
>> Add device tree binding for NAND on the BCM63268.
>>
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers.
>>
>>
2015-12-02 11:05 GMT-08:00 Brian Norris :
> + Broadcom list + Kamal
>
> On Tue, Nov 24, 2015 at 08:19:37PM -, Simon Arlott wrote:
>> Add device tree binding for NAND on the BCM63268.
>>
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers.
>>
>> Signed-off-
On 02/12/15 19:05, Brian Norris wrote:
> + Broadcom list + Kamal
>
> On Tue, Nov 24, 2015 at 08:19:37PM -, Simon Arlott wrote:
>> Add device tree binding for NAND on the BCM63268.
>>
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers.
>>
>> Signed-off-
From: Alex Bennée
You just make it harder to figure out when commands are being used.
Signed-off-by: Alex Bennée
Signed-off-by: Jin Qian
---
drivers/platform/goldfish/goldfish_pipe.c | 16 +---
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/platform/goldfis
On Mon, Nov 30, 2015 at 10:45:11AM +0530, Vignesh R wrote:
> In addition to providing direct access to SPI bus, some spi controller
> hardwares (like ti-qspi) provide special port (like memory mapped port)
> that are optimized to improve SPI flash read performance.
I'm reasonably OK with this from
From: Jason Hu
Add ACPI binding to the android pipe driver
Signed-off-by: Jason Hu
Signed-off-by: Jin Qian
---
drivers/platform/goldfish/goldfish_pipe.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/platform/goldfish/goldfish_pipe.c
b/drivers/platform/goldfish/goldfish_
Hello.
On 12/02/2015 07:52 PM, Salil Mehta wrote:
This patch adds the initializzation code to disable the hardware
vlan support for VLAN Tag stripping by default for now.
Proper support of "hardware VLAN assitance" feature would
soon come in the next coming patches.
Signed-off-by: Salil Mehta
On Wednesday 02 December 2015 19:28:25 Russell King - ARM Linux wrote:
>
> As I said above, that's not the problem, the problem is merging it into
> the rest of my tree.
>
> Having done most of that merge, I'm now tripping up on:
>
> arch/arm/mach-dove/common.c: In function 'dove_wdt_init':
> ar
Mark Brown writes:
> Hi Rusty,
>
> After merging the modules tree, today's linux-next x86 allmodconfig build
> (20151201) failed like this:
>
> /home/broonie/next/next/arch/x86/kernel/livepatch.c: In function
> 'klp_write_module_reloc':
> /home/broonie/next/next/arch/x86/kernel/livepatch.c:75:22
On Wednesday 02 December 2015 19:37:08 Russell King - ARM Linux wrote:
> On Wed, Dec 02, 2015 at 07:28:25PM +, Russell King - ARM Linux wrote:
> > The first is easy to solve, and the second by replacing it with dove.h.
> > The next problem is this:
> >
> > arch/arm/plat-orion/common.c:25:30: f
On 02/12/15 19:18, Brian Norris wrote:
> + Broadcom list + Kamal
>
> Hi Simon,
>
> On Wed, Nov 25, 2015 at 07:49:13PM +, Simon Arlott wrote:
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers. It also has a clock for the NAND controller that needs to be
Waiman Long writes:
> Currently, the update_tg_load_avg() function attempts to update the
> tg's load_avg value whenever the load changes even for root_task_group
> where the load_avg value will never be used. This patch will disable
> the load_avg update when the given task group is the root_tas
On Wed, Dec 02, 2015 at 08:46:54PM +0800, Baolin Wang wrote:
> These are the benchmarks for request based dm-crypt. Please check it.
Now please put request-based dm-crypt completely to one side and focus
just on the existing bio-based code. Why is it slower and what can be
adjusted to improve th
On Wed, Dec 2, 2015 at 12:12 PM, Toshi Kani wrote:
> On Wed, 2015-12-02 at 13:02 -0700, Toshi Kani wrote:
>> On Wed, 2015-12-02 at 11:00 -0800, Dan Williams wrote:
>> > On Wed, Dec 2, 2015 at 11:26 AM, Toshi Kani wrote:
>> > > On Wed, 2015-12-02 at 10:06 -0800, Dan Williams wrote:
>> > > > On Wed
The units[] array could be accessed out of its bounds due the lack of
verification of the max vector value.
To make this function not prone to error "P" and "E" suffixes were added.
Despite the new suffixes are unrelated to current ia64 vm magnitudes, they
make the code ready for it and avoid misl
Hi,
On Wed, Dec 02, 2015 at 07:41:07PM +, Simon Arlott wrote:
> >> + nand0: nandcs@0 {
> >> + compatible = "brcm,nandcs";
> >> + reg = <0>;
> >> + nand-on-flash-bbt;
> >> + nand-ecc-strength = <1>;
> >> + nand-ecc-step-size = <512>;
> >> +
> >> +
In this patch, the infrastructure needed to support multibuffer
encryption implementation is added:
a) Enhace mcryptd daemon to support blkcipher requests.
b) Update configuration to include multi-buffer encryption build support.
For an introduction to the multi-buffer implementation, please se
In this patch series, we introduce AES CBC encryption that is parallelized
on x86_64 cpu with XMM registers. The multi-buffer technique encrypt 8
data streams in parallel with SIMD instructions. Decryption is handled
as in the existing AESNI Intel CBC implementation which can already
parallelize d
This patch introduces the data structures and prototypes of functions
needed for doing AES CBC encryption using multi-buffer. Included are
the structures of the multi-buffer AES CBC job, job scheduler in C and
data structure defines in x86 assembly code.
Originally-by: Chandramouli Narayanan
Sig
Waiman Long writes:
> If a system with large number of sockets was driven to full
> utilization, it was found that the clock tick handling occupied a
> rather significant proportion of CPU time when fair group scheduling
> and autogroup were enabled.
>
> Running a java benchmark on a 16-socket Iv
This patch introduces the multi-buffer job manager which is responsible
for submitting scatter-gather buffers from several AES CBC jobs
to the multi-buffer algorithm. The glue code interfaces with the
underlying algorithm that handles 8 data streams of AES CBC encryption
in parallel. AES key expan
On 02/12/15 19:38, Florian Fainelli wrote:
> 2015-12-02 11:05 GMT-08:00 Brian Norris :
>> + Broadcom list + Kamal
>>
>> On Tue, Nov 24, 2015 at 08:19:37PM -, Simon Arlott wrote:
>>> Add device tree binding for NAND on the BCM63268.
>>>
>>> The BCM63268 has a NAND interrupt register with combine
This patch implements in-order scheduler for encrypting multiple buffers
in parallel supporting AES CBC encryption with key sizes of
128, 192 and 256 bits. It uses 8 data lanes by taking advantage of the
SIMD instructions with XMM registers.
The multibuffer manager and scheduler is mostly written
This patch introduces the assembly routine to do a by8 AES CBC encryption
in support of the AES CBC multi-buffer implementation.
Encryption of 8 data streams of a key size are done simultaneously.
Originally-by: Chandramouli Narayanan
Signed-off-by: Tim Chen
---
arch/x86/crypto/aes-cbc-mb/aes
The suggestions look reasonable to me too.
>Arvind, since I was originally just resending your patch, do you want
>to make the changes Johannes suggests, or should I proceed with that?
> josh
Hi Josh,
Feel free to send out the updated patch if you would like.
Thanks!
Arvind
* Brian Norris [151202 10:14]:
> On Wed, Dec 02, 2015 at 07:03:17AM -0800, Tony Lindgren wrote:
> > * Roger Quadros [151201 21:13]:
> > > On 02/12/15 08:56, Brian Norris wrote:
> > > >
> > > > I'll take another pass over your patch set, but if things are looking
> > > > better, how do you expect
On Tue, 2015-12-01 at 09:19 -0800, Tim Chen wrote:
> On Thu, 2015-11-26 at 16:49 +0800, Herbert Xu wrote:
> > On Tue, Nov 24, 2015 at 10:30:06AM -0800, Tim Chen wrote:
> > >
> > > On the decrypt path, we don't need to use multi-buffer algorithm
> > > as aes-cbc decrypt can be parallelized inherentl
[0.00] tsc: PIT calibration matches HPET. 2 loops
[0.00] tsc: Detected 2399.975 MHz processor
[0.090897] TSC deadline timer enabled
[1.960034] tsc: Refined TSC clocksource calibration: 2400.007 MHz
[1.960039] clocksource: tsc: mask: 0x max_cycles:
0x22983
On Wed, 2015-12-02 at 11:35 -0800, Jin Qian wrote:
> From: Alex Bennée
>
> You just make it harder to figure out when commands are being used.
>
> Signed-off-by: Alex Bennée
> Signed-off-by: Jin Qian
> ---
> drivers/platform/goldfish/goldfish_pipe.c | 16 +---
> 1 file changed, 5
The patch
regulator: wm831x-ldo: Use platform_register/unregister_drivers()
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the
The patch
regulator: wm831x-dcdc: Use platform_register/unregister_drivers()
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in th
On Wed, Dec 2, 2015 at 10:34 AM, Ross Zwisler
wrote:
> I'm hitting a few more test failures in my testing setup with v4.4-rc3, xfs
> and DAX. My test setup is a pair of 4GiB PMEM partitions in a KVM virtual
> machine. Here are the failures:
>
Is this a passing test with a v4.3 baseline? git bi
The patch
regulator: core: Fix nested locking of supplies
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) an
The patch
regulator: lp8788-ldo: Use platform_register/unregister_drivers()
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the
On 02/12/15 20:00, Brian Norris wrote:
> Hi,
>
> On Wed, Dec 02, 2015 at 07:41:07PM +, Simon Arlott wrote:
>> >> + nand0: nandcs@0 {
>> >> + compatible = "brcm,nandcs";
>> >> +
>> >> + #address-cells = <0>;
>> >> + #size-cells = <0>;
>
>> I think they're also implicit
Hi,
On Wed, Dec 02, 2015 at 07:54:49PM +, Simon Arlott wrote:
> On 02/12/15 19:18, Brian Norris wrote:
> > On Wed, Nov 25, 2015 at 07:49:13PM +, Simon Arlott wrote:
> >> +static int bcm63268_nand_probe(struct platform_device *pdev)
> >> +{
> >> + struct device *dev = &pdev->dev;
> >> + s
The patch
regulator: core: Ensure we lock all regulators
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
Hello Dmitry,
On 11/20/2015 04:46 PM, Javier Martinez Canillas wrote:
> On 11/20/2015 04:32 PM, Javier Martinez Canillas wrote:
>
> [snip]
>
>>
>> But is not complete because the .driver_data in i2c_device_id is an
>> kernel_ulong_t while the .data in of_device_id is a const void * so
>> some ca
On Wed, Nov 04 2015 at 9:02P -0500,
Sami Tolvanen wrote:
> Move optional argument parsing into a separate function to make it
> easier to add more of them without making verity_ctr even longer.
>
> Signed-off-by: Sami Tolvanen
I've taken this patch, for Linux 4.5, but I've applied the followi
Hi Greg,
Today's linux-next merge of the staging tree got a conflict in
drivers/staging/rtl8188eu/include/phy.h between Linus' tree and commit
"staging: rtl8188eu: using unique names is good" from the staging tree.
It looks like the patch is already applied so I skipped it.
pgpZt49LSNUZq.pgp
De
On 01/12/15 10:41, Jonas Gorski wrote:
> On Sat, Nov 28, 2015 at 8:23 PM, Simon Arlott wrote:
>> +
>> + /* Go to start of buffer */
>> + buf -= FC_WORDS;
>> +
>> + /* Erased if all data bytes are 0xFF */
>> + buf_erased = memchr_inv(buf, 0xFF, FC_WORDS) == NULL;
>> +
>> +
Hi Simon,
On Wed, Dec 02, 2015 at 08:12:32PM +, Simon Arlott wrote:
> On 02/12/15 20:00, Brian Norris wrote:
> > On Wed, Dec 02, 2015 at 07:41:07PM +, Simon Arlott wrote:
> >> I've created a bcm963268part driver so there won't need to be any
> >> partitions in DT for bcm63268.
> >
> > Jus
On Mon, Nov 09 2015 at 2:19P -0500,
Sami Tolvanen wrote:
> On Mon, Nov 09, 2015 at 11:37:35AM -0500, Mike Snitzer wrote:
> > I'm left wondering: can the new error correction code be made an
> > optional feature that is off by default? -- so as to preserve some
> > isolation of this new code from
On Wed, Dec 02, 2015 at 08:51:04PM +0100, Arnd Bergmann wrote:
> I'm mostly interested in it because it's the only ARMv7 platform that is
> left after my other patches, and I just want to be done with it after
> spending 5 years on it ;-)
My understanding is that the long term goal is to delete ma
On Wed, Dec 02, 2015 at 12:21:27PM -0800, Brian Norris wrote:
> On Wed, Dec 02, 2015 at 08:12:32PM +, Simon Arlott wrote:
> > Is there a patch for that method of parser detection available?
>
> I have something working here, but I haven't had time to finish cleaning
> it up and submitting it.
On 02/12/15 12:53, Mark Brown wrote:
> On Wed, Dec 02, 2015 at 12:45:50PM -, Simon Arlott wrote:
>> On Tue, December 1, 2015 22:16, Mark Brown wrote:
>
>> > Why are these in the DT, I would expect that if this is a driver for a
>> > specific SoC all these properties would be known as a result
The use of CONFIG_DEBUG_RODATA is generally seen as an essential part of
kernel self-protection:
http://www.openwall.com/lists/kernel-hardening/2015/11/30/13
Additionally, its name has grown to mean things beyond just rodata. To
get ARM closer to this, we ought to rearrange the names of the configs
On Wed, Dec 02, 2015 at 11:34:38AM -0700, Ross Zwisler wrote:
> I'm hitting a few more test failures in my testing setup with v4.4-rc3, xfs
> and DAX. My test setup is a pair of 4GiB PMEM partitions in a KVM virtual
> machine. Here are the failures:
Which are caused by commit 1ca1915 ("xfs: Don'
Hi,
On 10/20/2015 11:18 AM, Tony Lindgren wrote:
Hi all,
* Dave Gerlach [150922 17:20]:
Hi,
This series is version 3 of the code to introduce a wkup_m3_ipc driver
to handle communication between the MPU and Cortex M3 present on TI AM335x
and AM437x SoCs. v2 of this series can be found at [1].
From: Gregory CLEMENT
Date: Wed, 02 Dec 2015 09:16:06 +0100
> Hi David,
>
> On mer., déc. 02 2015, David Miller wrote:
>
>> From: Marcin Wojtas
>> Date: Mon, 30 Nov 2015 13:27:40 +0100
>>
>>> I'm sending v4 with corrected commit log of the last patch, in order
>>> to avoid possible conflict
On 12/02/2015 12:01 PM, Rasmus Villemoes wrote:
> On Mon, Nov 30 2015, Vlastimil Babka wrote:
>
> I'd prefer to have the formatting code in vsprintf.c, so that we'd avoid
> having to call vsnprintf recursively (and repeatedly - not that this is
> going to be used in hot paths, but if the box is g
On 02/12/15 20:21, Brian Norris wrote:
> Hi Simon,
>
> On Wed, Dec 02, 2015 at 08:12:32PM +, Simon Arlott wrote:
>> On 02/12/15 20:00, Brian Norris wrote:
>> > On Wed, Dec 02, 2015 at 07:41:07PM +, Simon Arlott wrote:
>> >> I've created a bcm963268part driver so there won't need to be any
On Wed, Dec 02, 2015 at 08:22:40PM +, Russell King - ARM Linux wrote:
> On Wed, Dec 02, 2015 at 08:51:04PM +0100, Arnd Bergmann wrote:
> > I'm mostly interested in it because it's the only ARMv7 platform that is
> > left after my other patches, and I just want to be done with it after
> > spend
Hey Uwe,
So I recently noticed that my alarmtimer suspend/resume tests
(selftests/timers/alartimer-suspend.c) were getting stuck testing w/
4.4-rc kernels when running under qemu (x86_64).
I've bisected this back to: b8b2c7d845 (base/platform: assert that
dev_pm_domain callbacks are called uncond
On Wed, 2015-12-02 at 11:57 -0800, Dan Williams wrote:
> On Wed, Dec 2, 2015 at 12:12 PM, Toshi Kani wrote:
> > On Wed, 2015-12-02 at 13:02 -0700, Toshi Kani wrote:
> > > On Wed, 2015-12-02 at 11:00 -0800, Dan Williams wrote:
> > > > On Wed, Dec 2, 2015 at 11:26 AM, Toshi Kani wrote:
> > > > > On
Replace dma_pool_alloc and memset with a single call to dma_pool_zalloc.
Caught by coccinelle.
Signed-off-by: Geyslan G. Bem
---
drivers/usb/host/uhci-q.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/usb/host/uhci-q.c b/drivers/usb/host/uhci-q.c
index da6f56d..c
From: Will Deacon
Date: Wed, 2 Dec 2015 09:15:18 +
> On Tue, Dec 01, 2015 at 02:20:40PM -0800, Shi, Yang wrote:
>> On 11/30/2015 2:24 PM, Yang Shi wrote:
>> >aarch64 doesn't have native store immediate instruction, such operation
>> >has to be implemented by the below instruction sequence:
>>
Replace dma_pool_alloc and memset with a single call to dma_pool_zalloc.
Caught by coccinelle.
Signed-off-by: Geyslan G. Bem
---
drivers/usb/host/whci/qset.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/usb/host/whci/qset.c b/drivers/usb/host/whci/qset.c
index d
On 02/12/15 18:03, Florian Fainelli wrote:
> 2015-11-30 12:58 GMT-08:00 Simon Arlott :
>> The BCM63xx contains a soft-reset controller activated by setting
>> a bit (that must previously have cleared).
>>
>> Signed-off-by: Simon Arlott
>> ---
>> MAINTAINERS | 1 +
>> drivers/r
Replace dma_pool_alloc and memset with a single call to dma_pool_zalloc.
Caught by coccinelle.
Signed-off-by: Geyslan G. Bem
---
drivers/usb/host/xhci-mem.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index
On Wed, Dec 2, 2015 at 9:17 PM, Simon Arlott wrote:
> On 01/12/15 10:41, Jonas Gorski wrote:
>> On Sat, Nov 28, 2015 at 8:23 PM, Simon Arlott wrote:
>>> +
>>> + /* Go to start of buffer */
>>> + buf -= FC_WORDS;
>>> +
>>> + /* Erased if all data bytes are 0xFF */
>>> + buf
On Thu, Dec 03, 2015 at 07:29:10AM +1100, Dave Chinner wrote:
> On Wed, Dec 02, 2015 at 11:34:38AM -0700, Ross Zwisler wrote:
> > I'm hitting a few more test failures in my testing setup with v4.4-rc3, xfs
> > and DAX. My test setup is a pair of 4GiB PMEM partitions in a KVM virtual
> > machine.
On Wed, Dec 2, 2015 at 12:39 PM, John Stultz wrote:
> Hey Uwe,
>
> So I recently noticed that my alarmtimer suspend/resume tests
> (selftests/timers/alartimer-suspend.c) were getting stuck testing w/
> 4.4-rc kernels when running under qemu (x86_64).
>
> I've bisected this back to: b8b2c7d845 (bas
I'm not even looking at this patch series while it still causes
unresolved bugs.
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On Wed, Dec 02, 2015 at 08:34:38PM +, Simon Arlott wrote:
> On 02/12/15 20:21, Brian Norris wrote:
> > On Wed, Dec 02, 2015 at 08:12:32PM +, Simon Arlott wrote:
> >> On 02/12/15 20:00, Brian Norris wrote:
> >> > On Wed, Dec 02, 2015 at 07:41:07PM +, Simon Arlott wrote:
> >> >> I've crea
The touchscreen may have a margin where not all the matrix is used. Read
the parameters from T9 and T100 and take account of the difference.
Signed-off-by: Nick Dyer
---
drivers/input/touchscreen/atmel_mxt_ts.c | 41
1 file changed, 36 insertions(+), 5 deletions(
Both T100 and T9 handle range and orientation in a similar fashion.
Reduce duplication between the two implementations.
Signed-off-by: Nick Dyer
---
drivers/input/touchscreen/atmel_mxt_ts.c | 68
1 file changed, 26 insertions(+), 42 deletions(-)
diff --git a/dri
The mXT1386 family of chips have a different architecture which splits
the diagnostic data into 3 columns.
Signed-off-by: Nick Dyer
---
drivers/input/touchscreen/atmel_mxt_ts.c | 30 +++---
1 file changed, 27 insertions(+), 3 deletions(-)
diff --git a/drivers/input/touch
Invert the diagnostic data to match the orientation of the input device.
Signed-off-by: Nick Dyer
---
drivers/input/touchscreen/atmel_mxt_ts.c | 22 +++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/input/touchscreen/atmel_mxt_ts.c
b/drivers/input/tou
Add a file in debugfs directory with info about the chip.
Signed-off-by: Nick Dyer
---
Documentation/ABI/testing/debugfs-heatmap | 14 ++
drivers/input/touchscreen/atmel_mxt_ts.c | 22 ++
2 files changed, 36 insertions(+)
diff --git a/Documentation/ABI/testing/d
Hello-
This is a series of patches to add diagnostic data support to the Atmel
maXTouch driver. There's an existing implementation in the open-source mxt-app
tool, however there are performance advantages to moving this code into the
driver.
The algorithm for retrieving the data has been fairly c
On 2015-12-02 00:13, Shawn Guo wrote:
> On Mon, Nov 30, 2015 at 05:59:26PM -0800, Stefan Agner wrote:
>> Linux on Vybrid used several different L2 latencies so far, none
>> of them seem to be the right ones. According to the application note
>> AN4947 ("Understanding Vybrid Architecture"), the tag
Add information to debugfs to allow a generic utility to retrieve
screen parameters and info.
Signed-off-by: Nick Dyer
---
Documentation/ABI/testing/debugfs-heatmap | 60 +++
drivers/input/touchscreen/atmel_mxt_ts.c | 46 ++--
2 files changed, 103
On Wed, Dec 2, 2015 at 1:37 PM, Toshi Kani wrote:
> On Wed, 2015-12-02 at 11:57 -0800, Dan Williams wrote:
[..]
>> The whole point of __get_user_page_fast() is to avoid the overhead of
>> taking the mm semaphore to access the vma. _PAGE_SPECIAL simply tells
>> __get_user_pages_fast that it needs
Retrieve refs data from the T37 diagnostic data object and expose it via
a binary attribute in debugfs.
Signed-off-by: Nick Dyer
---
drivers/input/touchscreen/atmel_mxt_ts.c | 212 +++
1 file changed, 212 insertions(+)
diff --git a/drivers/input/touchscreen/atmel_mxt
There are different datatypes available from a maXTouch chip. Add
support to retrieve reference data as well.
Signed-off-by: Nick Dyer
---
drivers/input/touchscreen/atmel_mxt_ts.c | 78
1 file changed, 60 insertions(+), 18 deletions(-)
diff --git a/drivers/input
On Wed, Dec 2, 2015 at 11:11 AM, Akshay Bhat wrote:
>
>
> On 11/06/2015 05:02 PM, Guenter Roeck wrote:
>>
>> On Fri, Nov 06, 2015 at 11:53:42AM -0800, Tim Harvey wrote:
>>>
>>> On Thu, Nov 5, 2015 at 2:23 PM, Guenter Roeck wrote:
On Thu, Nov 05, 2015 at 04:19:21PM -0500, Akshay Bhat wro
Hi,
On Wed, Dec 02, 2015 at 09:44:04PM +0100, Jonas Gorski wrote:
> On Wed, Dec 2, 2015 at 9:17 PM, Simon Arlott wrote:
> > On 01/12/15 10:41, Jonas Gorski wrote:
> >> On Sat, Nov 28, 2015 at 8:23 PM, Simon Arlott wrote:
> >>> +
> >>> + /* Go to start of buffer */
> >>> + buf -= FC_W
SYSCTL_WRITES_WARN was added in f4aacea2f5d1a ("sysctl: allow for strict
write position handling"), and released in v3.16 in August of 2014. Since
then I can find only 1 instance of non-zero offset writing[1], and it
was fixed immediately in CRIU[2]. As such, it appears safe to flip this
to the str
From: Pavel Fedin
Date: Wed, 02 Dec 2015 14:30:37 +0300
> Hello again!
>
>> Subject: RE: [PATCH v2 4/5] net: thunderx: Switchon carrier only upon
>> interface link up
>>
>> Just a reminder, we have issue with this one too, which is not addressed
>> yet.
>
> I have examined the problem tho
On Wed, Dec 02, 2015 at 12:46:10PM -0800, John Stultz wrote:
> On Wed, Dec 2, 2015 at 12:39 PM, John Stultz wrote:
> > Hey Uwe,
> >
> > So I recently noticed that my alarmtimer suspend/resume tests
> > (selftests/timers/alartimer-suspend.c) were getting stuck testing w/
> > 4.4-rc kernels when run
On Wed, 2015-12-02 at 12:54 -0800, Dan Williams wrote:
> On Wed, Dec 2, 2015 at 1:37 PM, Toshi Kani wrote:
> > On Wed, 2015-12-02 at 11:57 -0800, Dan Williams wrote:
> [..]
> > > The whole point of __get_user_page_fast() is to avoid the overhead of
> > > taking the mm semaphore to access the vma.
Here is another update to the richacl patch queue. I still think these patches
are ready for the next merge window.
In reply to the previous posting (https://lkml.org/lkml/2015/11/11/60),
Christoph has commented that richacls should use new syscalls as their
user-space interface instead of xattrs
Normally, deleting a file requires MAY_WRITE access to the parent
directory. With richacls, a file may be deleted with MAY_DELETE_CHILD access
to the parent directory or with MAY_DELETE_SELF access to the file.
To support that, pass the MAY_DELETE_CHILD mask flag to inode_permission()
when checki
The vfs does not apply the umask for file systems that support acls. The
test used for this used to be called IS_POSIXACL(). Switch to a new
IS_ACL() test to check for either posix acls or richacls instead. Add a new
MS_RICHACL flag and IS_RICHACL() test for richacls alone. The IS_POSIXACL()
test i
Richacls distinguish between creating non-directories and directories. To
support that, add an isdir parameter to may_create(). When checking
inode_permission() for create permission, pass in an additional
MAY_CREATE_FILE or MAY_CREATE_DIR mask flag.
Add may_replace() to allow checking for delete
We will need to call iop->permission and iop->get_acl from
inode_change_ok() for additional permission checks, and both take a
non-const inode.
Signed-off-by: Andreas Gruenbacher
Reviewed-by: J. Bruce Fields
Reviewed-by: Andreas Dilger
---
fs/attr.c | 2 +-
include/linux/fs.h | 2 +-
Richacls support permissions that allow to take ownership of a file,
change the file permissions, and set the file timestamps. Support that
by introducing new permission mask flags and by checking for those mask
flags in inode_change_ok().
Signed-off-by: Andreas Gruenbacher
Reviewed-by: J. Bruce
We need to map from POSIX permissions to NFSv4 permissions when a
chmod() is done, from NFSv4 permissions to POSIX permissions when an acl
is set (which implicitly sets the file permission bits), and from the
MAY_READ/MAY_WRITE/MAY_EXEC/MAY_APPEND flags to NFSv4 permissions when
doing an access che
A richacl consists of an NFSv4 acl and an owner, group, and other mask.
These three masks correspond to the owner, group, and other file
permission bits, but they contain NFSv4 permissions instead of POSIX
permissions.
Each entry in the NFSv4 acl applies to the file owner (OWNER@), the
owning grou
A richacl roughly grants a requested access if the NFSv4 acl in the
richacl grants the requested permissions according to the NFSv4
permission check algorithm and the file mask that applies to the process
includes the requested permissions.
Signed-off-by: Andreas Gruenbacher
Reviewed-by: "J. Bruc
acl_by_type(inode, type) returns a pointer to either inode->i_acl or
inode->i_default_acl depending on type. This is useful in
fs/posix_acl.c, but should never have been visible outside that file.
Signed-off-by: Andreas Gruenbacher
---
fs/posix_acl.c| 3 +--
include/linux/posix_acl.
Compute upper bound owner, group, and other file masks with as few
permissions as possible without denying any permissions that the NFSv4
acl in a richacl grants.
This algorithm is used when a file inherits an acl at create time and
when an acl is set via a mechanism that does not provide file mas
Doing a chmod() sets the file mode, which includes the file permission
bits. When a file has a richacl, the permissions that the richacl
grants need to be limited to what the new file permission bits allow.
This is done by setting the file masks in the richacl to what the file
permission bits map
Cache richacls in struct inode so that this doesn't have to be done
individually in each filesystem. This is similar to POSIX ACLs.
Signed-off-by: Andreas Gruenbacher
---
fs/inode.c | 11 +--
fs/posix_acl.c | 2 +-
fs/richacl_inode.c | 77
On Wed, Dec 02, 2015 at 09:38:10PM +0100, Andrew Lunn wrote:
> I agree. We have multiplatform dove already, it is in mach-mvebu. Do
> we really need both mach-dove and mach-mvebu dove in one kernel?
Only to support my efforts in adding further Dove support. As you
know, we've recently added PMU s
Add device tree binding for the BCM6345 soft reset controller.
The BCM6345 contains a soft-reset controller activated by setting
a bit (that must previously have cleared).
Signed-off-by: Simon Arlott
---
Renamed to bcm6345, removed "mask" property.
.../bindings/reset/brcm,bcm6345-reset.txt
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