Notify all related thermal zones when the sensor reports a thermal trip.
Signed-off-by: Lina Iyer
---
drivers/thermal/of-thermal.c | 83 ++--
include/linux/thermal.h | 4 ++
2 files changed, 84 insertions(+), 3 deletions(-)
diff --git a/drivers/thermal/of
Aggregate thermal trip based on the trip points of the thermal zones
that use this sensor as the source.
Signed-off-by: Lina Iyer
---
drivers/thermal/of-thermal.c | 28 ++-
drivers/thermal/thermal_helpers.c | 37 ++-
include/linux/thermal.h
To allow different mitigative actions based on a sensor temperature, it
is desirable to have multiple thermal zones share the same source. The
thermal zones could have different thresholds, mitigative actions and
even different governors.
Signed-off-by: Lina Iyer
---
drivers/thermal/of
we already pad out the string 'id' field
to exactly 8 bytes with the strncpy() onto the stack.
Cc: Mahesh Sivasubramanian
Cc: Lina Iyer
Cc: Bjorn Andersson
Cc: Evan Green
Signed-off-by: Stephen Boyd
---
Changes from inline patch:
* Fixed magic
* Made function for memcmp()
*
driver
On Tue, Apr 17 2018 at 11:22 -0600, Lina Iyer wrote:
On Thu, Apr 12 2018 at 16:41 -0600, Stephen Boyd wrote:
This driver deals with memory that is stored in little-endian format.
Update the structures with the proper little-endian types and then
do the proper conversions when reading the fields
On Mon, Apr 16 2018 at 00:01 -0600, Stephen Boyd wrote:
Quoting Lina Iyer (2018-04-16 09:08:18)
On Fri, Apr 13 2018 at 16:40 -0600, Stephen Boyd wrote:
>Well it seems like an RSC contains many DRVs and those DRVs contain many
>TCSes. This is what I get after talking with Bjorn
On Tue, Oct 25 2016 at 17:51 -0600, Rafael J. Wysocki wrote:
On Tuesday, October 25, 2016 10:47:29 AM Stephen Rothwell wrote:
Hi Rafael,
Today's linux-next merge of the pm tree got a conflict in:
arch/arm/mach-imx/gpc.c
between commits:
eef0b282bb58 ("ARM: imx: gpc: Initialize all power
Hi Ohad,
Any comments?
Thanks,
Lina
On Tue, Jun 09 2015 at 10:23 -0600, Lina Iyer wrote:
This patch follows the discussion based on the first RFC series posted on the
mailing list [1]. The discussion resulted in a couple of directives for
hwspinlocks that do not want the framework imposing a
On Thu, Jul 09 2015 at 03:28 -0600, Lorenzo Pieralisi wrote:
On Thu, Jul 09, 2015 at 09:43:04AM +0100, Jisheng Zhang wrote:
On Thu, 9 Jul 2015 16:31:24 +0800
Jisheng Zhang wrote:
> As for the suspend member function, the to-be-suspended cpu is always
> the calling cpu itself, so the 'cpu' para
ce_node here may not be
necessary either, because we can get the node via. of_get_cpu_node().
Signed-off-by: Jisheng Zhang
Tested-by: Lina Iyer
---
arch/arm/include/asm/cpuidle.h | 6 +++---
arch/arm/kernel/cpuidle.c | 8
drivers/soc/qcom/spm.c | 17 -
Enable QCOM_SCM for QCOM power management driver
Signed-off-by: Lina Iyer
---
drivers/soc/qcom/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
index 5eea374..e9a2c19 100644
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom
On Fri, Jul 10 2015 at 14:29 -0600, Dave Gerlach wrote:
On 07/10/2015 02:36 PM, Stephen Boyd wrote:
On 07/10/2015 12:31 PM, Dave Gerlach wrote:
Hello,
I am seeing the following error when building v4.2-rc1 for arm with
multi_v7_defconfig with CONFIG_SMP=n:
LINKvmlinux
LD vmlinux.o
On Fri, Dec 18 2015 at 09:15 -0700, Georgi Djakov wrote:
The SAW2 (Subsystem Power Manager and Adaptive Voltage Scaling Wrapper)
is part of the SPM subsystem. It is a hardware block found on some of the
Qualcomm chipsets, which regulates the power to the CPU cores. Add some
basic support for it,
On Thu, Jun 18 2020 at 07:06 -0600, Maulik Shah wrote:
Currently rpmh_invalidate() always returns success. Update its
return type to void.
Suggested-by: Stephen Boyd
Signed-off-by: Maulik Shah
Reviewed-by: Lina Iyer
---
drivers/interconnect/qcom/bcm-voter.c | 6 +-
drivers/soc/qcom
On Wed, Aug 19 2020 at 04:41 -0600, Ulf Hansson wrote:
A device may have specific HW constraints that must be obeyed to, before
its corresponding PM domain (genpd) can be powered off - and vice verse at
power on. These constraints can't be managed through the regular runtime PM
based deployment f
Hi Ulf,
On Tue, Sep 01 2020 at 06:41 -0600, Ulf Hansson wrote:
On Tue, 1 Sep 2020 at 14:35, Ulf Hansson wrote:
On Tue, 1 Sep 2020 at 12:42, wrote:
>
> On Tue, Sep 01, 2020 at 08:50:57AM +0200, Ulf Hansson wrote:
> > On Tue, 1 Sep 2020 at 08:46, Ulf Hansson wrote:
> > > On Mon, 31 Aug 2020 a
On Tue, Oct 13 2020 at 06:23 -0600, Ulf Hansson wrote:
A device may have specific HW constraints that must be obeyed to, before
its corresponding PM domain (genpd) can be powered off - and vice verse at
power on. These constraints can't be managed through the regular runtime PM
based deployment f
Hi Anders,
On Tue, Oct 27 2020 at 05:14 -0600, Anders Roxell wrote:
When building allmodconfig leading to the following link error with
CONFIG_QCOM_RPMH=y and CONFIG_QCOM_COMMAND_DB=m:
aarch64-linux-gnu-ld: drivers/clk/qcom/clk-rpmh.o: in function `clk_rpmh_probe':
drivers/clk/qcom/clk-rpmh.c:
On Wed, Oct 28 2020 at 03:43 -0600, Anders Roxell wrote:
On Tue, 27 Oct 2020 at 22:15, Lina Iyer wrote:
Hi Anders,
On Tue, Oct 27 2020 at 05:14 -0600, Anders Roxell wrote:
>When building allmodconfig leading to the following link error with
>CONFIG_QCOM_RPMH=y and CONFIG_QCOM_COMMAN
mers that we are about to power off. */
+ ret = __raw_notifier_call_chain(&genpd->power_notifiers,
+ GENPD_NOTIFY_PRE_OFF, NULL, -1,
+ &nr_calls);
+ ret = notifier_to_errno(ret);
+ if (ret)
+ goto busy;
Nit: You could enclose this in
On Mon, Jul 27 2020 at 18:45 -0600, Stephen Boyd wrote:
Quoting Lina Iyer (2020-07-24 09:28:25)
On Fri, Jul 24 2020 at 03:03 -0600, Rajendra Nayak wrote:
>Hi Maulik/Lina,
>
>On 7/23/2020 11:36 PM, Stanimir Varbanov wrote:
>>Hi Rajendra,
>>
>>After applying 2,
On Tue, Jul 28 2020 at 13:51 -0600, Stephen Boyd wrote:
Quoting Lina Iyer (2020-07-28 09:52:12)
On Mon, Jul 27 2020 at 18:45 -0600, Stephen Boyd wrote:
>Quoting Lina Iyer (2020-07-24 09:28:25)
>> On Fri, Jul 24 2020 at 03:03 -0600, Rajendra Nayak wrote:
>> >Hi Maulik/Lina,
>
f the busy loop we
currently have today.
Cc: Douglas Anderson
Cc: Maulik Shah
Cc: Lina Iyer
Signed-off-by: Stephen Boyd
---
drivers/soc/qcom/rpmh-internal.h | 2 +
drivers/soc/qcom/rpmh-rsc.c | 101 ---
2 files changed, 41 insertions(+), 62 deletions(-)
diff --git
On Fri, Jul 24 2020 at 03:03 -0600, Rajendra Nayak wrote:
Hi Maulik/Lina,
On 7/23/2020 11:36 PM, Stanimir Varbanov wrote:
Hi Rajendra,
After applying 2,3 and 4/5 patches on linaro-integration v5.8-rc2 I see
below messages on db845:
qcom-venus aa0.video-codec: dev_pm_opp_set_rate: failed t
On Fri, Jul 24 2020 at 14:01 -0600, Stephen Boyd wrote:
Quoting Doug Anderson (2020-07-24 12:49:56)
Hi,
On Fri, Jul 24, 2020 at 12:44 PM Stephen Boyd wrote:
I think Lina was alluding to this earlier in this
thread.
I was thinking more of threaded irq handler than a kthread to post the
reques
On Fri, Jul 24 2020 at 14:11 -0600, Stephen Boyd wrote:
Quoting Lina Iyer (2020-07-24 13:08:41)
On Fri, Jul 24 2020 at 14:01 -0600, Stephen Boyd wrote:
>Quoting Doug Anderson (2020-07-24 12:49:56)
>> Hi,
>>
>> On Fri, Jul 24, 2020 at 12:44 PM Stephen Boyd wrote:
>I th
-Original Message-
Date: Wed, 19 Aug 2020 12:40:57 +0200
From: Ulf Hansson
To: "Rafael J . Wysocki" , Kevin Hilman
, linux...@vger.kernel.org
Cc: Sudeep Holla , Lorenzo Pieralisi
, Daniel Lezcano ,
Lina Iyer , Lukasz Luba , Vincent
Guittot , Stephen Boyd , Bjorn
Andersson
On Mon, Apr 15 2019 at 06:43 -0600, Marc Zyngier wrote:
On 13/03/2019 21:18, Lina Iyer wrote:
Hi all,
This series adds support for wakeup capable GPIOs. It is based on Thierry's
hiearchical GPIO domains. This approach is based on Stephen's idea [1]. The SoC
that is used for this deve
On Mon, Jan 28 2019 at 07:19 -0700, Linus Walleij wrote:
On Thu, Jan 24, 2019 at 9:22 PM Lina Iyer wrote:
This is a bug fix submission of the v1 posted here [1]. The discussion on how
to represent the wakeup-parent interrupt controller is on-going [2] here. The
reiew comments in [1], from
On Wed, Jan 30 2019 at 15:45 -0700, Stephen Boyd wrote:
Quoting Lina Iyer (2019-01-24 12:22:02)
To allow GPIOs to wakeup the system from suspend or deep idle, the
wakeup capable GPIOs are setup in hierarchy with interrupts from the
wakeup-parent irqchip.
In older SoC's, the TLMM will han
driver hooks
explicitly.
Thanks to Saravana for his help on pointing out the
IRQCHIP_DECLARE issue and guidance on a solution.
Cc: Andy Gross
Cc: Bjorn Andersson
Cc: Joerg Roedel
Cc: Thomas Gleixner
Cc: Jason Cooper
Cc: Marc Zyngier
Cc: Linus Walleij
Cc: Lina Iyer
Cc: Saravana Kannan
Cc
On Mon, Feb 19 2018 at 20:31 +, Rob Herring wrote:
On Fri, Feb 16, 2018 at 03:46:14PM -0700, Lina Iyer wrote:
From: Mahesh Sivasubramanian
+The devicetree representation of the command DB driver should be:
Need to state this is a child of /reserved-memory
Yes, ofcourse. Will fix
Hi Evan,
Thanks for your review.
On Fri, Feb 16 2018 at 23:51 +, Evan Green wrote:
Hello Lina,
On Thu, Feb 15, 2018 at 9:35 AM, Lina Iyer wrote:
Sleep and wake requests are sent when the application processor
subsystem of the SoC is entering deep sleep states like in suspend.
These
On Wed, Feb 21 2018 at 22:07 +, Evan Green wrote:
Hi Lina,
On Thu, Feb 15, 2018 at 9:35 AM, Lina Iyer wrote:
[...]
+static struct cache_req *cache_rpm_request(struct rpmh_client *rc,
+ enum rpmh_state state
On Wed, Feb 21 2018 at 23:25 +, Evan Green wrote:
Hello Lina,
On Thu, Feb 15, 2018 at 9:35 AM, Lina Iyer wrote:
Platform drivers need make a lot of resource state requests at the same
time, say, at the start or end of an usecase. It can be quite
inefficient to send each request separately
.
rpmh_write_batch() is a blocking call that can be used to send multiple
RPMH command sets. Each RPMH command set is set asynchronously and the
API blocks until all the command sets are complete and receive their
tx_done callbacks.
Signed-off-by: Lina Iyer
---
drivers/soc/qcom/rpmh.c | 150
Allow sleep and wake commands to be cleared from the respective TCSes,
so that they can be re-populated.
Signed-off-by: Lina Iyer
---
drivers/soc/qcom/rpmh-internal.h | 1 +
drivers/soc/qcom/rpmh-rsc.c | 46
2 files changed, 47 insertions(+)
diff
e consider reviewing this patchset.
v1: https://www.spinics.net/lists/devicetree/msg210980.html
Lina Iyer (10):
drivers: qcom: rpmh-rsc: add RPMH controller for QCOM SoCs
dt-bindings: introduce RPMH RSC bindings for Qualcomm SoCs
drivers: qcom: rpmh-rsc: log RPMH requests in FTRACE
dri
the wake TCS
is being repurposed to send active request, hence the sleep and wake
TCSes be invalidated before the active request is sent.
Signed-off-by: Lina Iyer
---
drivers/soc/qcom/rpmh-rsc.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/qcom
Log sent RPMH requests and interrupt responses in FTRACE.
Cc: Steven Rostedt
Signed-off-by: Lina Iyer
---
drivers/soc/qcom/Makefile | 1 +
drivers/soc/qcom/rpmh-rsc.c | 6 +++
drivers/soc/qcom/trace-rpmh.h | 89 +++
3 files changed, 96 insertions
in the context of the controller's thread and frees the
allocated memory. This API allows RPMH requests from atomic contexts as
well.
Signed-off-by: Lina Iyer
---
drivers/soc/qcom/rpmh.c | 52 +
include/soc/qcom/rpmh.h | 8
2 files ch
PM activity and may be called from the
system PM drivers when the system is entering suspend or deeper sleep
modes during cpuidle.
Also allow invalidating the cached requests, so they may be re-populated
again.
Signed-off-by: Lina Iyer
---
drivers/soc/qcom/rpmh.c | 213
Add device binding documentation for Qualcomm Technology Inc's RPMH RSC
driver. The hardware block is used for communicating resource state
requests for shared resources.
Cc: devicet...@vger.kernel.org
Signed-off-by: Lina Iyer
---
.../devicetree/bindings/arm/msm/rpmh-rsc.txt
are
dedicated for each type of requests. Control TCS are used to provide
specific information to the controller.
Signed-off-by: Lina Iyer
---
drivers/soc/qcom/Kconfig| 10 +
drivers/soc/qcom/Makefile | 1 +
drivers/soc/qcom/rpmh-internal.h| 86
used to send
active state requests.
Signed-off-by: Lina Iyer
---
drivers/soc/qcom/Makefile| 4 +-
drivers/soc/qcom/rpmh-internal.h | 2 +
drivers/soc/qcom/rpmh-rsc.c | 7 ++
drivers/soc/qcom/rpmh.c | 257 +++
include/soc/qcom/rpmh.h
at the time of writing. The TCS are triggered by the firmware
after the last of the CPUs has executed its WFI. Since these requests
may come in different batches of requests, it is job of this controller
driver to find arrange the requests into the available TCSes.
Signed-off-by: Lina Iyer
On Wed, Feb 14 2018 at 19:34 +, Bjorn Andersson wrote:
On Thu 08 Feb 11:51 PST 2018, Lina Iyer wrote:
From: Mahesh Sivasubramanian
Command DB provides information on shared resources like clocks,
regulators etc., probed at boot by the remote subsytem and made
available in shared memory
On Mon, Feb 12 2018 at 13:40 +, Thomas Gleixner wrote:
On Fri, 9 Feb 2018, Lina Iyer wrote:
+enum pdc_irq_config_bits {
+ PDC_POLARITY_LOW= 0,
+ PDC_FALLING_EDGE= 2,
+ PDC_POLARITY_HIGH = 4,
+ PDC_RISING_EDGE = 6,
+ PDC_DUAL_EDGE
On Thu, Feb 15 2018 at 20:24 +, Thomas Gleixner wrote:
On Thu, 15 Feb 2018, Lina Iyer wrote:
On Mon, Feb 12 2018 at 13:40 +, Thomas Gleixner wrote:
> On Fri, 9 Feb 2018, Lina Iyer wrote:
> > +enum pdc_irq_config_bits {
> > + PDC_POLARITY_LOW= 0,
> > +
On Thu, Feb 15 2018 at 19:57 +, Steven Rostedt wrote:
On Thu, 15 Feb 2018 10:35:00 -0700
Lina Iyer wrote:
@@ -298,6 +303,7 @@ static void __tcs_buffer_write(struct rsc_drv *drv, int m,
int n,
write_tcs_reg(drv, RSC_DRV_CMD_MSGID, m, n + i, msgid
Hi Steve,
On Thu, Feb 15 2018 at 17:35 +, Lina Iyer wrote:
Log sent RPMH requests and interrupt responses in FTRACE.
Cc: Steven Rostedt
Signed-off-by: Lina Iyer
---
drivers/soc/qcom/Makefile | 1 +
drivers/soc/qcom/rpmh-rsc.c | 6 +++
drivers/soc/qcom/trace-rpmh.h | 89
On Thu, Feb 15 2018 at 20:51 +, Steven Rostedt wrote:
On Thu, 15 Feb 2018 20:41:18 +
Lina Iyer wrote:
>--- a/drivers/soc/qcom/Makefile
>+++ b/drivers/soc/qcom/Makefile
>@@ -1,4 +1,5 @@
> # SPDX-License-Identifier: GPL-2.0
>+CFLAGS_trace-rpmh.o := -I$(src)
I did this he
.com/linux-kernel@vger.kernel.org/msg1600634.html
v3: https://lkml.org/lkml/2018/2/6/595
v4: https://www.spinics.net/lists/linux-arm-msm/msg32906.html
v5: https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1605500.html
v6: https://lkml.org/lkml/2018/2/9/545
Lina Iyer (2):
drivers: ir
ff-by: Archana Sathyakumar
Signed-off-by: Lina Iyer
---
.../bindings/interrupt-controller/qcom,pdc.txt | 78 ++
1 file changed, 78 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
diff --git
a/Documentation/devicetree/bin
GIC
may wake up the processor.
Signed-off-by: Archana Sathyakumar
Signed-off-by: Lina Iyer
---
drivers/irqchip/Kconfig| 9 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/qcom-pdc.c | 311 +
3 files changed, 321 insertions(+)
create mode 1
SoC and the platform
are made available in the shared memory. Drivers can query this
information using predefined strings.
Signed-off-by: Mahesh Sivasubramanian
Signed-off-by: Lina Iyer
---
drivers/soc/qcom/Kconfig | 9 ++
drivers/soc/qcom/Makefile | 1 +
drivers/soc/qcom/cmd-db.c | 321
available for Linux. A pre-defined string is used as a key into
an entry in the database. Generally, platform drivers query the database only
at init to get the information they need.
[v1]: https://www.spinics.net/lists/linux-arm-msm/msg32462.html
Lina Iyer (2):
drivers: qcom: add command DB
From: Mahesh Sivasubramanian
Command DB provides information on shared resources like clocks,
regulators etc., probed at boot by the remote subsytem and made
available in shared memory.
Cc: devicet...@vger.kernel.org
Signed-off-by: Mahesh Sivasubramanian
Signed-off-by: Lina Iyer
On Thu, Feb 08 2018 at 20:48 +, Jordan Crouse wrote:
On Thu, Feb 08, 2018 at 12:51:53PM -0700, Lina Iyer wrote:
From: Mahesh Sivasubramanian
Command DB is a simple database in the shared memory of QCOM SoCs, that
provides information regarding shared resources. Some shared resources
in
kernel.org/msg1600634.html
v3: https://lkml.org/lkml/2018/2/6/595
v4: https://www.spinics.net/lists/linux-arm-msm/msg32906.html
Lina Iyer (2):
drivers: irqchip: pdc: Add PDC interrupt controller for QCOM SoCs
dt-bindings/interrupt-controller: pdc: descibe PDC device binding
.../bindings/interrupt-
ff-by: Archana Sathyakumar
Signed-off-by: Lina Iyer
---
.../bindings/interrupt-controller/qcom,pdc.txt | 78 ++
1 file changed, 78 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
diff --git
a/Documentation/devicetree/bin
GIC
may wake up the processor.
Signed-off-by: Archana Sathyakumar
Signed-off-by: Lina Iyer
---
drivers/irqchip/Kconfig| 9 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/qcom-pdc.c | 312 +
3 files changed, 322 insertions(+)
create mode 1
//www.mail-archive.com/linux-kernel@vger.kernel.org/msg1600634.html
v3: https://lkml.org/lkml/2018/2/6/595
v4: https://www.spinics.net/lists/linux-arm-msm/msg32906.html
Lina Iyer (2):
drivers: irqchip: pdc: Add PDC interrupt controller for QCOM SoCs
dt-bindings/interrupt-controller: pdc: d
GIC
may wake up the processor.
Signed-off-by: Archana Sathyakumar
Signed-off-by: Lina Iyer
---
drivers/irqchip/Kconfig| 9 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/qcom-pdc.c | 314 +
3 files changed, 324 insertions(+)
create mode 1
ff-by: Archana Sathyakumar
Signed-off-by: Lina Iyer
---
.../bindings/interrupt-controller/qcom,pdc.txt | 78 ++
1 file changed, 78 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
diff --git
a/Documentation/devicetree/bin
From: Archana Sathyakumar
Log key PDC pin configuration in FTRACE.
Cc: Steven Rostedt
Signed-off-by: Archana Sathyakumar
Signed-off-by: Lina Iyer
---
drivers/irqchip/qcom-pdc.c | 7 ++
include/trace/events/pdc.h | 55 ++
2 files changed, 62
his series adds support for the PDC's interrupt controller.
Please consider reviewing these patches.
RFC v1: https://patchwork.kernel.org/patch/10180857/
Lina Iyer (3):
drivers: irqchip: pdc: Add PDC interrupt controller for QCOM SoCs
dt-bindings/interrupt-controller: pdc: descibe PDC
ff-by: Archana Sathyakumar
Signed-off-by: Lina Iyer
---
.../bindings/interrupt-controller/qcom,pdc.txt | 78 ++
1 file changed, 78 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
diff --git
a/Documentation/devicetree/bin
GIC
may wake up the processor.
Signed-off-by: Archana Sathyakumar
Signed-off-by: Lina Iyer
---
drivers/irqchip/Kconfig| 9 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/qcom-pdc.c | 326 +
3 files changed, 336 insertions(+)
create mode 1
On Fri, Feb 02 2018 at 16:21 +, Marc Zyngier wrote:
Hi Lina,
On 02/02/18 14:21, Lina Iyer wrote:
From : Archana Sathyakumar
The Power Domain Controller (PDC) on QTI SoCs like SDM845 houses an
interrupt controller along with other domain control functions to handle
interrupt related
All valid comments. Will fix them all in the next rev.
Thanks Thomas.
-- Lina
On Fri, Feb 02 2018 at 15:37 +, Thomas Gleixner wrote:
On Fri, 2 Feb 2018, Lina Iyer wrote:
+static inline void pdc_enable_intr(struct irq_data *d, bool on)
+{
+ int pin_out = d->hwirq;
+ u32 in
On Fri, Feb 02 2018 at 16:28 +, Marc Zyngier wrote:
On 02/02/18 14:21, Lina Iyer wrote:
From: Archana Sathyakumar
Add device binding documentation for the PDC Interrupt controller on
QCOM SoC's like the SDM845. The interrupt-controller can be used to
sense edge low interrupts and w
On Fri, Feb 02 2018 at 16:32 +, Steven Rostedt wrote:
On Fri, 2 Feb 2018 07:22:00 -0700
Lina Iyer wrote:
Hi Lina,
This looks really good. I have one nit below.
From: Archana Sathyakumar
Log key PDC pin configuration in FTRACE.
Cc: Steven Rostedt
Signed-off-by: Archana Sathyakumar
On Fri, Feb 02 2018 at 15:57 +, Thomas Gleixner wrote:
On Fri, 2 Feb 2018, Lina Iyer wrote:
+++ b/include/trace/events/pdc.h
@@ -0,0 +1,55 @@
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
On Fri, Feb 02 2018 at 23:02 +, Lina Iyer wrote:
On Fri, Feb 02 2018 at 15:57 +, Thomas Gleixner wrote:
On Fri, 2 Feb 2018, Lina Iyer wrote:
+++ b/include/trace/events/pdc.h
@@ -0,0 +1,55 @@
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is
Hi Steve,
On Fri, Feb 02 2018 at 14:22 +, Lina Iyer wrote:
From: Archana Sathyakumar
Log key PDC pin configuration in FTRACE.
Cc: Steven Rostedt
Signed-off-by: Archana Sathyakumar
Signed-off-by: Lina Iyer
---
drivers/irqchip/qcom-pdc.c | 7 ++
include/trace/events/pdc.h | 55
From: Mahesh Sivasubramanian
Command DB provides information on shared resources like clocks,
regulators etc., probed at boot by the remote subsytem and made
available in shared memory.
Cc: devicet...@vger.kernel.org
Signed-off-by: Mahesh Sivasubramanian
Signed-off-by: Lina Iyer
drivers query the database only
at init to get the information they need.
[v1]: https://www.spinics.net/lists/linux-arm-msm/msg32462.html
[v2]: https://lkml.org/lkml/2018/2/8/588
Lina Iyer (2):
drivers: qcom: add command DB driver
dt-bindings: introduce Command DB for QCOM SoCs
.../devicetree
SoC and the platform
are made available in the shared memory. Drivers can query this
information using predefined strings.
Signed-off-by: Mahesh Sivasubramanian
Signed-off-by: Lina Iyer
---
drivers/of/platform.c | 1 +
drivers/soc/qcom/Kconfig | 9 ++
drivers/soc/qcom/Makefile | 1
Thanks Evan for your review.
On Fri, Feb 16 2018 at 21:30 +, Evan Green wrote:
Hi Lina,
On Thu, Feb 15, 2018 at 9:34 AM, Lina Iyer wrote:
+
+/**
+ * tcs_response: Response object for a request
Can you embed the acronym definition, ie: tcs_response: Responses for
a Trigger Command Set
On Mon, Feb 12 2018 at 13:40 +, Thomas Gleixner wrote:
On Fri, 9 Feb 2018, Lina Iyer wrote:
+/*
+ * GIC does not handle falling edge or active low. To allow falling edge and
+ * active low interrupts to be handled at GIC, PDC has an inverter that inverts
+ * falling edge into a rising edge
From: Mahesh Sivasubramanian
Command DB provides information on shared resources like clocks,
regulators etc., probed at boot by the remote subsytem and made
available in shared memory.
Cc: devicet...@vger.kernel.org
Signed-off-by: Mahesh Sivasubramanian
Signed-off-by: Lina Iyer
---
Changes
init to get the information they need.
[v1]: https://www.spinics.net/lists/linux-arm-msm/msg32462.html
[v2]: https://lkml.org/lkml/2018/2/8/588
[v3]: https://lkml.org/lkml/2018/2/16/842
Lina Iyer (2):
drivers: qcom: add command DB driver
dt-bindings: introduce Command DB for QCOM SoCs
SoC and the platform
are made available in the shared memory. Drivers can query this
information using predefined strings.
Signed-off-by: Mahesh Sivasubramanian
Signed-off-by: Lina Iyer
---
drivers/of/platform.c | 1 +
drivers/soc/qcom/Kconfig | 9 ++
drivers/soc/qcom/Makefile | 1
interrupt controller.
Please consider reviewing these patches.
RFC v1: https://patchwork.kernel.org/patch/10180857/
RFC v2:
https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1600634.html
Lina Iyer (2):
drivers: irqchip: pdc: Add PDC interrupt controller for QCOM SoCs
dt-bindings
ff-by: Archana Sathyakumar
Signed-off-by: Lina Iyer
---
.../bindings/interrupt-controller/qcom,pdc.txt | 80 ++
1 file changed, 80 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
diff --git
a/Documentation/devicetree/bin
GIC
may wake up the processor.
Signed-off-by: Archana Sathyakumar
Signed-off-by: Lina Iyer
---
drivers/irqchip/Kconfig| 9 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/qcom-pdc.c | 302 +
3 files changed, 312 insertions(+)
create mode 1
On Tue, Feb 06 2018 at 20:34 +, Marc Zyngier wrote:
On Tue, 06 Feb 2018 18:09:04 +,
Lina Iyer wrote:
+#define PDC_MAX_IRQS 126
From v2: "Is that an absolute, architectural maximum? Or should it
come from the DT (being the sum of all ranges that are provided by
thi
ff-by: Archana Sathyakumar
Signed-off-by: Lina Iyer
---
.../bindings/interrupt-controller/qcom,pdc.txt | 80 ++
1 file changed, 80 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
diff --git
a/Documentation/devicetree/bin
kernel.org/msg1600634.html
v3: https://lkml.org/lkml/2018/2/6/595
Lina Iyer (2):
drivers: irqchip: pdc: Add PDC interrupt controller for QCOM SoCs
dt-bindings/interrupt-controller: pdc: descibe PDC device binding
.../bindings/interrupt-controller/qcom,pdc.txt | 80 ++
drivers/irqch
GIC
may wake up the processor.
Signed-off-by: Archana Sathyakumar
Signed-off-by: Lina Iyer
---
drivers/irqchip/Kconfig| 9 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/qcom-pdc.c | 311 +
3 files changed, 321 insertions(+)
create mode 1
On Wed, Feb 07 2018 at 16:43 +, Bjorn Andersson wrote:
On Wed 07 Feb 07:49 PST 2018, Lina Iyer wrote:
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
[..]
+Example:
[..]
+ wake
On Wed, Feb 07 2018 at 16:43 +, Marc Zyngier wrote:
On 07/02/18 15:49, Lina Iyer wrote:
From : Archana Sathyakumar
The Power Domain Controller (PDC) on QTI SoCs like SDM845 houses an
interrupt controller along with other domain control functions to handle
interrupt related functions like
Hi Bjorn,
On Thu, Sep 01 2016 at 16:28 -0600, Bjorn Andersson wrote:
This series splits the virtio rpmsg bus driver into a rpmsg bus and a virtio
backend/wireformat.
As we discussed the Qualcomm SMD implementation a couple of years back people
suggested that I should make it "a rpmsg thingie".
On Mon, Sep 12 2016 at 10:52 -0600, Lina Iyer wrote:
Hi Bjorn,
On Thu, Sep 01 2016 at 16:28 -0600, Bjorn Andersson wrote:
This series splits the virtio rpmsg bus driver into a rpmsg bus and a virtio
backend/wireformat.
As we discussed the Qualcomm SMD implementation a couple of years back
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