On Thu, Jul 14, 2011 at 07:58:35AM +0900, Grant Likely wrote:
> On Thu, Jul 14, 2011 at 7:57 AM, Grant Likely
> wrote:
> > On Thu, Jul 14, 2011 at 7:06 AM, G, Manjunath Kondaiah
> > wrote:
> >>
> >> Add omap3 SoC file for handling omap3 SoC i2c controllers existing
> >> on l4-core bus.
> >>
> >
On Thu, Jul 14, 2011 at 07:57:16AM +0900, Grant Likely wrote:
> On Thu, Jul 14, 2011 at 7:06 AM, G, Manjunath Kondaiah wrote:
> >
> > Add omap3 SoC file for handling omap3 SoC i2c controllers existing
> > on l4-core bus.
> >
> > Out of three i2c controllers, first i2c controller is interfaced with
On Thu, Jul 14, 2011 at 7:57 AM, Grant Likely wrote:
> On Thu, Jul 14, 2011 at 7:06 AM, G, Manjunath Kondaiah wrote:
>>
>> Add omap3 SoC file for handling omap3 SoC i2c controllers existing
>> on l4-core bus.
>>
>> Out of three i2c controllers, first i2c controller is interfaced with
>> PMIC on a
On Thu, Jul 14, 2011 at 7:06 AM, G, Manjunath Kondaiah wrote:
>
> Add omap3 SoC file for handling omap3 SoC i2c controllers existing
> on l4-core bus.
>
> Out of three i2c controllers, first i2c controller is interfaced with
> PMIC on all the boards of OMAP3. The clock for i2c controllers are
> co
Add omap3 SoC file for handling omap3 SoC i2c controllers existing
on l4-core bus.
Out of three i2c controllers, first i2c controller is interfaced with
PMIC on all the boards of OMAP3. The clock for i2c controllers are
controlled through omap hwmod framework hence first i2c controller
device reg
