Re: [PATCH v2] thermal_hwmon: Fix the 'No sensors found' error after replacing the parameter NULL by the actual device

On 03/10/18 08:25, Cao Van Dong wrote: Formerly, when registering the hwmon device, we pass NULL as the device. It's not a problem. Recently, the developer has replaced the parameter NULL as the device by the actual device. This causes the "No sensors found" error. Therefore, instead of

Re: [PATCH] dt-bindings: irqchip: renesas-irqc: Document r8a7744 support

On 25/09/18 17:56, Biju Das wrote: Document RZ/G1N (R8A7744) SoC bindings. Signed-off-by: Biju Das Reviewed-by: Chris Paterson --- Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt | 1 + 1 file changed, 1 insertion(+) diff --git

Re: [PATCH] dt-bindings: irqchip: renesas-irqc: Document R-Car E3 support

On 28/09/18 12:32, Geert Uytterhoeven wrote: Document support for the Interrupt Controller for External Devices (INTC-EX) in the Renesas E3 (r8a77990) SoC. No driver update is needed. Signed-off-by: Geert Uytterhoeven --- .../devicetree/bindings/interrupt-controller/renesas,irqc.txt | 4

Re: [PATCH] dt-bindings: irqchip: renesas-irqc: Document r8a77470 support

Hi Biju, On 27/06/18 09:43, Biju Das wrote: > Hello Marc, > > Sorry to bother you. Are you happy to merge the below patch with 4.18-rc3? > https://www.spinics.net/lists/linux-renesas-soc/msg25788.html This is odd. I queued that in April as part of a potential second set of fixes for 4.17, but

Re: [PATCH v9 07/12] ARM: sunxi: Add initialization of CNTVOFF

entry. > > Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com> > Acked-by: Maxime Ripard <maxime.rip...@bootlin.com> Acked-by: Marc Zyngier <marc.zyng...@arm.com> M. -- Jazz is not dead. It just smells funny...

Re: [PATCH v9 06/12] ARM: smp: Add initialization of CNTVOFF

n > folder. > > Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com> > Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be> > Tested-by: Geert Uytterhoeven <geert+rene...@glider.be> Reviewed-by: Marc Zyngier <marc.zyng...@arm.com> M. -- Jazz is not dead. It just smells funny...

Re: [PATCH] dt-bindings: irqchip: renesas-irqc: Document r8a77470 support

On 29/03/18 11:17, Biju Das wrote: > Renesas RZ/G SoC have the R-Car gen2 compatible IRQC interrupt > controllers. Document RZ/G1C (also known as R8A77470) SoC bindings. > > Signed-off-by: Biju Das > Reviewed-by: Fabrizio Castro > --- >

Re: [PATCH v3 0/3] renesas: irqchip: Use wakeup_path i.s.o. explicit clock handling

On 12/02/18 13:55, Geert Uytterhoeven wrote: > Hi all, > > If an interrupt controller in a Renesas ARM SoC is part of a Clock > Domain, and it is part of the wakeup path, it must be kept active during > system suspend. > > Currently this is handled in all interrupt controller drivers by >

Re: [PATCH 1/2] ARM: shmobile: Add CA7 arch_timer initialization for secondary CPUs

On 04/07/17 19:20, Geert Uytterhoeven wrote: > Hi Marc, > > On Tue, Jul 4, 2017 at 7:32 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: >> On 04/07/17 18:02, Geert Uytterhoeven wrote: >>> On Cortex-A7, the arch timer CNTVOFF register is uninitialized. >>

Re: [PATCH 1/2] ARM: shmobile: Add CA7 arch_timer initialization for secondary CPUs

Hi Geert, On 04/07/17 18:02, Geert Uytterhoeven wrote: > On Cortex-A7, the arch timer CNTVOFF register is uninitialized. > Hence when enabling SMP on r8a7794, the kernel log is spammed with: > > WARNING: Underflow in clocksource 'arch_sys_counter' observed, time > update ignored. >

Re: [PATCH v2] irqchip/renesas-irqc: Postpone driver initialization

Hi Geert, On 08/11/16 19:35, Geert Uytterhoeven wrote: > Currently the renesas-irqc driver uses postcore_initcall(). > > However, the new CPG/MSSR driver uses subsys_initcall(). Hence the > IRQC's probe will be deferred, which causes the Micrel Ethernet PHY to > not find its interrupt on R-Car

Re: [PATCH v2] drivers/perf: arm-pmu: Handle per-interrupt affinity mask

Hi Geert, On 19/07/16 14:25, Geert Uytterhoeven wrote: > Hi Marc, Catalin, Will, > > On Wed, Jul 6, 2016 at 4:33 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: >> On a big-little system, PMUs can be wired to CPUs using per CPU >> interrups (PPI). In this case, i

Re: [PATCH] arm64: dts: r8a7795: Increase the size of GIC-400 mapped registers

On 10/05/16 16:29, Dirk Behme wrote: > On 10.05.2016 16:17, Marc Zyngier wrote: >> On 10/05/16 14:33, Geert Uytterhoeven wrote: >>> CC Marc, lakml >>> >>> On Tue, Apr 19, 2016 at 8:29 AM, Dirk Behme <dirk.be...@de.bosch.com> wrote: >>>>

Re: [PATCH] arm64: dts: r8a7795: Increase the size of GIC-400 mapped registers

On 10/05/16 14:33, Geert Uytterhoeven wrote: > CC Marc, lakml > > On Tue, Apr 19, 2016 at 8:29 AM, Dirk Behme wrote: >> From: Pooya Keshavarzi >> >> There are some requirements about the GIC-400 memory layout and its >> mapping if using

Re: [PATCH] arm64: dts: r8a7795: Increase the size of GIC-400 mapped registers

On Fri, 29 Apr 2016 09:43:45 +1000 Simon Horman wrote: > [Cc Mark Zyngier, linux-arm-kernel] > > Hi Dirk, > > On Thu, Apr 28, 2016 at 07:41:57AM +0200, Dirk Behme wrote: > > Hi Simon, > > > > On 28.04.2016 01:30, Simon Horman wrote: > > >Hi Dirk, > > > > > >I understand

Re: [PATCH/RFC v2] gpio: rcar: Add Runtime PM handling for interrupts

On 11/04/16 17:26, Laurent Pinchart wrote: > On Friday 19 Feb 2016 11:59:40 Marc Zyngier wrote: >> On 19/02/16 09:18, Linus Walleij wrote: >>> Top-quoting so everyone on the new To:-line gets the context. >>> >>> I definately need an indication from an irqchi

Re: [PATCH/RFC v2] gpio: rcar: Add Runtime PM handling for interrupts

fforts with Jon Hunters similar problem space. Seems pretty straightforward to me. Acked-by: Marc Zyngier <marc.zyng...@arm.com> Thanks, M. -- Jazz is not dead. It just smells funny...

Re: ARM GIC DT binding reg block mismatch? (Re: [PATCH v11 1/8] arm64: renesas: r8a7795: Add Renesas R8A7795 SoC support)

On 15/02/16 18:53, Dirk Behme wrote: > On 15.02.2016 11:55, Marc Zyngier wrote: >> On 15/02/16 10:35, Geert Uytterhoeven wrote: >>> Hi Marc, >>> >>> On Mon, Feb 15, 2016 at 9:45 AM, Marc Zyngier <marc.zyng...@arm.com> wrote: >>>> On 15/02/1

Re: ARM GIC DT binding reg block mismatch? (Re: [PATCH v11 1/8] arm64: renesas: r8a7795: Add Renesas R8A7795 SoC support)

On 15/02/16 10:35, Geert Uytterhoeven wrote: > Hi Marc, > > On Mon, Feb 15, 2016 at 9:45 AM, Marc Zyngier <marc.zyng...@arm.com> wrote: >> On 15/02/16 08:16, Geert Uytterhoeven wrote: >>> On Wed, Dec 9, 2015 at 9:23 AM, Geert Uytterhoeven <ge...@linux-m68k.or

Re: ARM GIC DT binding reg block mismatch? (Re: [PATCH v11 1/8] arm64: renesas: r8a7795: Add Renesas R8A7795 SoC support)

On 15/02/16 08:16, Geert Uytterhoeven wrote: > Cc Marz Zyngier > Cc Dirk Behme > Cc devicetree > Cc linux-renesas-soc > Drop linux-sh > > On Wed, Dec 9, 2015 at 9:23 AM, Geert Uytterhoeven > wrote: >> On Tue, Nov 3, 2015 at 3:28 PM, Mark Rutland