Now that we have completely moved from older USB-PHY drivers
to newer GENERIC-PHY drivers for PHYs available with USB controllers
on Exynos series of SoCs, we can remove the support for the same
in our host drivers too.
We also defer the probe for our host in case we end up getting
EPROBE_DEFER er
On Mon, Sep 29, 2014 at 7:21 AM, Greg KH wrote:
> On Thu, Sep 25, 2014 at 10:50:22AM +0530, Vivek Gautam wrote:
>> Hi Greg,
>>
>>
>> On Mon, Sep 22, 2014 at 11:15 AM, Vivek Gautam
>> wrote:
>> > Now that we have completely moved from older USB-PHY drivers
>> > to newer GENERIC-PHY drivers for PH
On Thu, Sep 25, 2014 at 10:50:22AM +0530, Vivek Gautam wrote:
> Hi Greg,
>
>
> On Mon, Sep 22, 2014 at 11:15 AM, Vivek Gautam
> wrote:
> > Now that we have completely moved from older USB-PHY drivers
> > to newer GENERIC-PHY drivers for PHYs available with USB controllers
> > on Exynos series o
Hi Tomasz,
On Tue, Sep 23, 2014 at 8:19 PM, Tomasz Figa wrote:
> On 23.09.2014 10:16, Abhilash Kesavan wrote:
> [snip]
>> @@ -383,9 +377,11 @@ static int exynos_wkup_irq_set_wake(struct irq_data
>> *irqd, unsigned int on)
>> /*
>> * irq_chip for wakeup interrupts
>> */
>> -static struct exy
From: Pankaj Dubey
Exynos7 has a similar serial controller to that present in older Samsung
SoCs. To re-use the existing serial driver on Exynos7 we need to have
SERIAL_SAMSUNG_UARTS_4 and SERIAL_SAMSUNG_UARTS selected. This is not
possible because these symbols are dependent on PLAT_SAMSUNG whic
From: Naveen Krishna Ch
Add intial pin configuration nodes for EXYNOS7.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Tomasz Figa
Cc: Linus Walleij
---
arch/arm64/boot/dts/ex
From: Naveen Krishna Ch
Enable pinctrl support for exynos7 SoCs.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Tomasz Figa
Cc: Linus Walleij
---
arch/arm64/Kconfig |2 ++
From: Naveen Krishna Ch
This patch adds initial driver data for Exynos7 pinctrl support.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Cc: Tomasz Figa
Cc: Linus Walleij
---
.../bindings/pinctrl/samsung-pinctrl.txt
Exynos7 uses different offsets for wakeup interrupt configuration registers.
So a new irq_chip instance for Exynos7 wakeup interrupts is added. The irq_chip
selection is now based on the wakeup interrupt controller compatible string.
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Te
Adding a irq_chip field to the samsung_pin_bank struct helps in
consolidating the irq domain callbacks for external gpio and wakeup
interrupt controllers. The exynos_wkup_irqd_ops and exynos_gpio_irqd_ops
have now been merged into a single exynos_eint_irqd_ops.
Signed-off-by: Abhilash Kesavan
Rev
The function exynos_irq_demux_eint16_31 uses pre-defined offsets for external
interrupt pending status and mask registers. So this function is not extensible
for Exynos7 SoC which has these registers at different offsets. Generalize
the exynos_irq_demux_eint16_31 function by using the pending/mask
Changes since v1:
- Marked the newly created irq_chip instances as __initdata
- Used kmemdup to keep a copy of the irq_chip
- Change the pinctrl name from sd0_rdqs to sd0_ds as per UM
- Moved the pinctrl enablement for exynos7 into a separate patch
- Added te
On Mon, Sep 29, 2014 at 11:47 AM, Pankaj Dubey wrote:
> Hi Chanwoo,
>
> On Monday, September 29, 2014 7:42 AM, Chanwoo Choi wrote,
>> To: Pankaj Dubey
>> Cc: linux-arm-ker...@lists.infradead.org;
> linux-samsung-soc@vger.kernel.org;
>> kgene@samsung.com; tomasz.f...@gmail.com; robh...@kernel.o
Hi Chanwoo,
On Monday, September 29, 2014 7:42 AM, Chanwoo Choi wrote,
> To: Pankaj Dubey
> Cc: linux-arm-ker...@lists.infradead.org;
linux-samsung-soc@vger.kernel.org;
> kgene@samsung.com; tomasz.f...@gmail.com; robh...@kernel.org;
> li...@arm.linux.org.uk; naus...@samsung.com; Mike Turquette
Hi Pankaj,
On 09/27/2014 01:58 PM, Pankaj Dubey wrote:
> Exynos3250 has four UART channels UART0,1,2 and 3. This patch adds
> missing clock entries for UART2 and UART3.
>
> CC: Mike Turquette
> CC: Sylwester Nawrocki
> Signed-off-by: Pankaj Dubey
> ---
> drivers/clk/samsung/clk-exynos3250.c
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