On Fri, Dec 11, 2015 at 11:08 AM, Boris Brezillon
wrote:
> Hi Dinh,
>
> On Fri, 11 Dec 2015 10:50:21 -0600
> Dinh Nguyen wrote:
>
>> Hi Boris,
>>
>> On Fri, Dec 11, 2015 at 9:10 AM, Boris Brezillon
>> wrote:
>> > + Dinh (who made commit 2a0a2
Hi Boris,
On Fri, Dec 11, 2015 at 9:10 AM, Boris Brezillon
wrote:
> + Dinh (who made commit 2a0a288ec258)
>
> Also added back the Fixes tag.
>
> On Fri, 11 Dec 2015 15:02:34 +0100
> Boris Brezillon wrote:
>
>> Unregister the NAND device from the NAND subsystem when removing a denali
>> NAND cont
ated.
> "supports-highspeed" property can be replaced with "cap-sd/mmc-highspeed".
>
> Signed-off-by: Jaehoon Chung
> Reviewed-by: Tushar Behera
> Reviewed-by: Ulf Hansson
> Acked-by: Seungwon Jeon
> Acked-by: Dinh Nguyen
> ---
I've queued this patch i
@
>
> dwmmc0@ff704000 {
> num-slots = <1>;
> - supports-highspeed;
> broken-cd;
> -
> - slot@0 {
> - reg = <0>;
> -
On 05/30/2014 01:15 PM, Heiko Stübner wrote:
Am Freitag, 30. Mai 2014, 21:54:13 schrieb Seungwon Jeon:
+ Dinh Nguyen
+ Heiko Stuebner
On Wed, May 28, 2014, Jaehoon Chung wrote:
dw-mmc controller can support the multiple slot.
So each slot's property can be difference.
And &qu
On 2/11/14 11:56 PM, Jingoo Han wrote:
> On Wednesday, February 12, 2014 2:34 PM, Stephen Warren wrote:
>> On 02/04/2014 02:45 PM, dingu...@altera.com wrote:
>>> From: Dinh Nguyen
>>>
>>> This means that the driver can be in host or peripheral mode when the
&
On Wed, 2014-02-05 at 00:42 +, Paul Zimmerman wrote:
> > From: dingu...@altera.com [mailto:dingu...@altera.com]
> > Sent: Tuesday, February 04, 2014 1:46 PM
> >
> > From: Dinh Nguyen
> >
> > This means that the driver can be in host or peripheral mode whe
On Tue, 2014-01-14 at 13:14 -0800, Greg KH wrote:
> On Tue, Jan 14, 2014 at 08:57:12PM +, Paul Zimmerman wrote:
> > > From: Dinh Nguyen [mailto:dingu...@altera.com]
> > > Sent: Tuesday, January 14, 2014 12:46 PM
> > >
> > > On Tue, 2014-01-14 at 06:21 -0
On Tue, 2014-01-14 at 06:21 -0800, Greg KH wrote:
> On Tue, Jan 14, 2014 at 05:01:00AM -0600, dingu...@altera.com wrote:
> > From: Dinh Nguyen
> >
> > Hi,
> >
> > I'm starting work downstream on combining the DWC2 host driver and the
> > s3c-hsotg
&
only reason for
this file is to set the sdr timing values. But since the register that
controls these SDR values are located out of the IP, it is probably best
to implement the settings in platform specific code.
Dinh
> >
> > This patch is compile tested only.
> CC'ed Dinh Nguye
interrupts = <0 180 4>;
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
Acked-by: Dinh Nguyen};
> };
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