On Mon, Jul 27, 2015 at 10:28:27PM +0100, Alexey Klimov wrote:
> Hi all,
>
> year(s) ago it was discovered that MCT timer and ARM architectured
> timer
> are the same hardware with different interface. Here [1].
Are they actually interfaces to the same timer, or are they just fed by
the same syst
> So NAK to the PSCI node and PSCI enable method in this dts until we
> either have a working firmware, or a reasonable mechanism to handle the
> deficiency.
> >>>
> >>> There is only CPU0 hotplug issue. Excpet CPU{1-7} are well working.
> >>
> >> I understand that, but the issue wit
Hi Chanwoo,
Could you please reply to the below?
Without an answer I'm going to have to ask for the patch to be unqueued
for the moment, and I'd prefer that we came to a solution instead.
Thanks,
Mark.
On Tue, Apr 07, 2015 at 11:25:27AM +0100, Mark Rutland wrote:
> > >>&g
> >>> I'm very worried about adding a DT that's known broken, especially when
> >>> we have no idea as to if/when the FW will be fixed judging from prior
> >>> replies.
> >>
> >> As I replied, I can not fix the FW because I don't have any code of FW.
> >
> > Surely you are able to contact those wh
On Tue, Mar 31, 2015 at 12:56:38AM +0100, Chanwoo Choi wrote:
> Hi Mark,
>
> On 03/31/2015 01:09 AM, Mark Rutland wrote:
> > Hi,
> >
> > On Wed, Mar 18, 2015 at 12:17:28AM +, Chanwoo Choi wrote:
> >> This patch adds new Exynos5433 dtsi to support
Hi,
On Wed, Mar 18, 2015 at 12:17:28AM +, Chanwoo Choi wrote:
> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
> Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
> PSCI (Power State Coordination Interface) v0.1.
>
> This patch inclu
[...]
> Do CPUs enter the kernel at EL2 or at EL1?
> >>>
> >>> Could you give me a tip how to check the kernel at EL2 or EL1?
> >>
> >> Hmm... I thought we logged this but it looks like we don't.
> >>
> >> You could hack in a check of is_hyp_mode_available() and
> >> is_hyp_mode_mismatched().
> CPU0 (boot CPU) is only well working for CPU_OFF.
> But when I try to turn on the CPU0 after CPU_OFF, I failed it.
> >>>
> >>> That's rather worrying. Can you look into what's going on here? I'd
> >>> rather not have dts describing things which are known to be broken.
> >>
> >> The boar
Hi,
> >> >> + psci {
> >> >> + compatible = "arm,psci";
> >> >> + method = "smc";
> >> >> + cpu_off = <0x8402>;
> >> >> + cpu_on = <0xC403>;
> >> >> + };
> >> >
> >> > Back at v2 you mentioned that CPU_OFF wasn't working [
Hi,
[...]
> >> + psci {
> >> + compatible = "arm,psci";
> >> + method = "smc";
> >> + cpu_off = <0x8402>;
> >> + cpu_on = <0xC403>;
> >> + };
> >
> > Back at v2 you mentioned that CPU_OFF wasn't working [1].
> >
> > Do bo
On Thu, Mar 05, 2015 at 05:38:23AM +, Chanwoo Choi wrote:
> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
> Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
> PSCI (Power State Coordination Interface) v0.1.
>
> This patch includes f
On Thu, Jan 15, 2015 at 12:52:38PM +, Chanwoo Choi wrote:
> On Thu, Jan 15, 2015 at 9:46 PM, Chanwoo Choi wrote:
> > Hi Mark,
> >
> > On Thu, Jan 15, 2015 at 8:29 PM, Mark Rutland wrote:
> >> On Wed, Jan 14, 2015 at 11:57:00PM +, Chanwoo Choi wrote:
> &g
On Wed, Jan 14, 2015 at 11:57:00PM +, Chanwoo Choi wrote:
> Hi Kukjin,
>
> On 01/15/2015 01:02 AM, Daniel Lezcano wrote:
> > On 01/14/2015 04:51 PM, Kukjin Kim wrote:
> >> On 01/14/15 14:33, Chanwoo Choi wrote:
> >>
> >> Hi,
> >>
> >> + Doug, Olof
> >>
> >>> This patch adds the support for Exy
On Fri, Dec 05, 2014 at 04:46:26PM +, Krzysztof Kozlowski wrote:
> Add documentation for bindings used by Exynos3250 devfreq driver.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> .../bindings/arm/samsung/exynos3250-devfreq.txt| 66
> ++
> 1 file changed, 66 insertio
Hi,
> >> + psci {
> >> + compatible = "arm,psci";
> >> + method = "smc";
> >> + cpu_off = <0x8402>;
> >> + cpu_on = <0xC403>;
> >> + };
> >
> > Given your comments on the latest posting, has CPU_OFF been tested, and
> > do
Cc: Kukjin Kim
> Cc: Mark Rutland
> Cc: Marc Zyngier
> Cc: Arnd Bergmann
> Cc: Olof Johansson
> Cc: Catalin Marinas
> Cc: Will Deacon
> Signed-off-by: Chanwoo Choi
> Acked-by: Inki Dae
> Acked-by: Geunsik Lim
> ---
> arch/arm
On Mon, Dec 01, 2014 at 02:21:46AM +, Chanwoo Choi wrote:
> Dear Mark,
>
> On 11/28/2014 11:00 PM, Mark Rutland wrote:
> > On Fri, Nov 28, 2014 at 01:18:25PM +, Chanwoo Choi wrote:
> >> Dear Mark,
> >>
> >> On 11/27/2014 08:18 PM, Mark Rutland
On Fri, Nov 28, 2014 at 01:18:25PM +, Chanwoo Choi wrote:
> Dear Mark,
>
> On 11/27/2014 08:18 PM, Mark Rutland wrote:
> > On Thu, Nov 27, 2014 at 07:35:13AM +, Chanwoo Choi wrote:
> >> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC
>
On Thu, Nov 27, 2014 at 07:34:59AM +, Chanwoo Choi wrote:
> This patch add binding documentation for Exynos5433 clock controller.
> Exynos5433 has various clock domains So, this documentation explains
> the detailed clock domains ans usage guide.
>
> Cc: Sylwester Nawrocki
> Cc: Tomasz Figa
On Thu, Nov 27, 2014 at 07:35:13AM +, Chanwoo Choi wrote:
> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC
> based on Octal core CPUs (quad Cortex-A57 and quad Cortex-A53).
>
> Cc: Kukjin Kim
> Cc: Mark Rutland
> Cc: Arnd Bergmann
> Cc: Olof Joh
> > + CPU_SLEEP: cpu-sleep {
> > + compatible = "arm,idle-state";
> > + local-timer-stop;
> > + arm,psci-suspend-param = <0x001>;
> > + entry-latency-us = <20>;
> > +
On Thu, Oct 09, 2014 at 04:19:47PM +0100, Javier Martinez Canillas wrote:
> Hello Mark,
>
> On 10/09/2014 12:27 PM, Mark Rutland wrote:
> >>
> >> Well, is not fairly obvious to me. One can also say the opposite, why the
> >> kernel is documenting a DT binding
On Wed, Oct 08, 2014 at 05:29:26PM +0100, Javier Martinez Canillas wrote:
> On 10/08/2014 05:12 PM, Mark Brown wrote:
> > On Wed, Oct 08, 2014 at 04:38:53PM +0200, Javier Martinez Canillas wrote:
> >> On 10/08/2014 04:25 PM, Mark Brown wrote:
> >
> >> > That doesn't mean that the definition of tho
On Thu, Oct 02, 2014 at 01:50:25AM +0100, YoungJun Cho wrote:
> From: Youngjun Cho
>
> This patch adds new board dts file to support Samsung Monk board which is
> based on Exynos3250 SoC and has different H/W configuration from Rinato.
>
> This patch is based on linux-samsung.git for-next branch
On Wed, Sep 24, 2014 at 12:19:45PM +0100, Tomasz Figa wrote:
> On 24.09.2014 13:14, Mark Rutland wrote:
> > On Wed, Sep 24, 2014 at 12:05:38PM +0100, Marek Szyprowski wrote:
> >> From: Tomasz Figa
> >>
> >> Firmware on certain boards (e.g. ODROID-U3) ca
On Wed, Sep 24, 2014 at 12:05:38PM +0100, Marek Szyprowski wrote:
> From: Tomasz Figa
>
> Firmware on certain boards (e.g. ODROID-U3) can leave incorrect L2C prefetch
> settings configured in registers leading to crashes if L2C is enabled
> without overriding them. This patch introduces bindings
On Tue, Sep 02, 2014 at 11:39:08AM +0100, Vivek Gautam wrote:
> Hi,
>
>
> On Fri, Aug 29, 2014 at 12:18 AM, Mark Rutland wrote:
> > On Thu, Aug 28, 2014 at 09:01:56AM +0100, Vivek Gautam wrote:
> >> Exynos7 also has a separate special gate clock going to the IP
&g
On Thu, Aug 28, 2014 at 09:01:56AM +0100, Vivek Gautam wrote:
> Exynos7 also has a separate special gate clock going to the IP
> apart from the usual AHB clock. So add support for the same.
>
> Signed-off-by: Vivek Gautam
> ---
> drivers/usb/dwc3/dwc3-exynos.c | 16
> 1 file c
On Thu, Aug 28, 2014 at 09:01:57AM +0100, Vivek Gautam wrote:
> Exynos7 SoC has now separate gate control for 125MHz pipe3 phy
> clock, as well as 60MHz utmi phy clock.
> So get the same and control in the phy-exynos5-usbdrd driver.
>
> Signed-off-by: Vivek Gautam
> ---
> .../devicetree/bindings
On Thu, Aug 28, 2014 at 06:47:00PM +0100, Geert Uytterhoeven wrote:
> Hi Mark,
>
> On Thu, Aug 28, 2014 at 7:39 PM, Mark Rutland wrote:
> >> >> Ok. If address-cells is kept at 2 the unit address needs to be changed
> >> >> to "0,0". So one or the
On Thu, Aug 28, 2014 at 06:37:19PM +0100, Marc Zyngier wrote:
> On 28/08/14 18:30, Mark Rutland wrote:
> > On Thu, Aug 28, 2014 at 06:27:04PM +0100, Marc Zyngier wrote:
> >> On 28/08/14 18:03, Mark Rutland wrote:
> >>
> >>> From 67104ad5a56e4c18f9c41f06af
On Thu, Aug 28, 2014 at 06:33:13PM +0100, Rob Herring wrote:
> On Thu, Aug 28, 2014 at 12:27 PM, Marc Zyngier wrote:
> > On 28/08/14 18:03, Mark Rutland wrote:
> >
> >> From 67104ad5a56e4c18f9c41f06af028b7561740afd Mon Sep 17 00:00:00 2001
> >> From: Mark Rutlan
On Thu, Aug 28, 2014 at 06:19:00PM +0100, Olof Johansson wrote:
> On Thu, Aug 28, 2014 at 10:03 AM, Mark Rutland wrote:
> > On Thu, Aug 28, 2014 at 05:28:22PM +0100, Olof Johansson wrote:
> >> On Thu, Aug 28, 2014 at 2:48 AM, Mark Rutland wrote:
> >> >
On Thu, Aug 28, 2014 at 06:27:04PM +0100, Marc Zyngier wrote:
> On 28/08/14 18:03, Mark Rutland wrote:
>
> > From 67104ad5a56e4c18f9c41f06af028b7561740afd Mon Sep 17 00:00:00 2001
> > From: Mark Rutland
> > Date: Thu, 28 Aug 2014 17:41:03 +0100
> > Subjec
On Thu, Aug 28, 2014 at 05:28:22PM +0100, Olof Johansson wrote:
> On Thu, Aug 28, 2014 at 2:48 AM, Mark Rutland wrote:
> > Hi,
> >
> >> > + cpus {
> >> > + #address-cells = <2>;
> >> > + #size-cells = <0>;
On Thu, Aug 28, 2014 at 02:10:18PM +0100, Thierry Reding wrote:
> On Thu, Aug 28, 2014 at 03:04:32PM +0530, Ajay kumar wrote:
> > On Thu, Aug 28, 2014 at 2:45 PM, Mark Rutland wrote:
> > > On Thu, Aug 28, 2014 at 06:34:33AM +0100, Ajay kumar wrote:
> > >> On Wed,
On Thu, Aug 28, 2014 at 10:34:32AM +0100, Ajay kumar wrote:
> On Thu, Aug 28, 2014 at 2:45 PM, Mark Rutland wrote:
> > On Thu, Aug 28, 2014 at 06:34:33AM +0100, Ajay kumar wrote:
> >> On Wed, Aug 27, 2014 at 8:31 PM, Mark Rutland wrote:
> >> > On Wed, Aug 27, 2014 a
Hi,
> > + cpus {
> > + #address-cells = <2>;
> > + #size-cells = <0>;
>
> Why size-cells=2? Can you not fit a cpuid in 32 bits?
As of commit 72aea393a2e7 (arm64: smp: honour #address-size when parsing
CPU reg property) Linux can handle single-cell cpu node reg entries
where
On Thu, Aug 28, 2014 at 06:34:33AM +0100, Ajay kumar wrote:
> On Wed, Aug 27, 2014 at 8:31 PM, Mark Rutland wrote:
> > On Wed, Aug 27, 2014 at 03:48:27PM +0100, Ajay Kumar wrote:
> >> Add DT nodes for ptn3460 bridge chip and panel.
> >> Add backlight enable pin and bac
On Wed, Aug 27, 2014 at 03:48:27PM +0100, Ajay Kumar wrote:
> Add DT nodes for ptn3460 bridge chip and panel.
> Add backlight enable pin and backlight power supply for pwm-backlight.
> Also add bridge phandle needed by dp to enable display on snow.
>
> Note that, snow doesn't support "chunghwa,cla
Hi,
On Wed, Aug 27, 2014 at 10:44:20AM +0100, Naveen Krishna Chatradhi wrote:
> From: Alim Akhtar
>
> This patch adds the necessary Kconfig entries to enable
> support for the ARMv8 based Exynos7 SoC.
>
> Signed-off-by: Alim Akhtar
> Signed-off-by: Naveen Krishna Chatradhi
> Cc: Rob Herring
Hi Naveen,
On Wed, Aug 27, 2014 at 10:44:18AM +0100, Naveen Krishna Chatradhi wrote:
> Add initial device tree nodes for EXYNOS7 SoC.
> Also, includes the dt-binding definitions for clock ids.
Fallout from a rebase? That latter part doesn't seem to be relevant.
> Signed-off-by: Naveen Krishna Ch
On Fri, Jul 18, 2014 at 05:00:02PM +0100, Bartlomiej Zolnierkiewicz wrote:
> Recent patch by Tomasz Figa ("irqchip: gic: Fix core ID calculation
> when topology is read from DT") fixed GIC driver to filter cluster ID
> from values returned by cpu_logical_map() for SoCs having registers
> mapped wit
On Fri, Jun 27, 2014 at 11:24:58AM +0100, Inki Dae wrote:
>
> + DT mailing list
Thanks for the Cc.
Can we get the rest of the series? Judging a series based on its
diffstat alone is a little hard...
Or is my mailbox filtering hiding the rest of these from me?
Any reason for not Ccing lakml?
M
t; + vsys-l2-supply = <&some_reg>;
>
> Your change matches the code and all existing device trees in the
> Linux kernel.
Could this fact please be mentioned in the commit message?
Given that:
Acked-by: Mark Rutland
> I also see plenty of other bindings with das
On Tue, Jun 24, 2014 at 01:19:15PM +0100, Naveen Krishna Chatradhi wrote:
> As Murata is the Manufactures the NTC thermistors. The vendor
> name in the compatibility is preposed to change to "murata, ncpXXX"
>
> This patch uses the new compatibility string in exynos4412 based
> Trats2 board.
>
>
On Tue, Jun 24, 2014 at 01:19:14PM +0100, Naveen Krishna Chatradhi wrote:
> Murata Manufacturing Co., Ltd is the vendor for
> NTC (Negative Temperature coefficient) based Thermistors.
> But, the driver extensively uses "NTC" as the vendor name.
>
> This patch corrects the vendor name also updates
national Co., Ltd.
> +murata Murata Manufacturing Co., Ltd.
Nit: please keep this list in alphabetical order.
Otherwise, this looks fine to me. With the order fixed:
Acked-by: Mark Rutland
Mark.
> national National Semiconductor
> neonode Neonode Inc.
> n
On Fri, May 30, 2014 at 09:01:16AM +0100, Ulf Hansson wrote:
> On 28 May 2014 07:35, Jaehoon Chung wrote:
> > Removed the parser for "supports-highspeed".
> > It can be parsed with "cap-mmc-highsped" or "cap-sd-highspeed" at
> > mmc_of_parse().
> >
> > Signed-off-by: Jaehoon Chung
> > ---
> > dr
On Fri, May 30, 2014 at 07:05:43PM +0100, Thomas Abraham wrote:
> Hi Mark,
>
> On Fri, May 30, 2014 at 6:38 PM, Mark Rutland wrote:
> > Hi,
> >
> > Apologies for being somewhat late w.r.t. review on this.
> >
> > On Fri, May 30, 2014 at 10:01:17AM +0100,
Cc: Pawel Moll
> Cc: Mark Rutland
> Cc: Ian Campbell
> Cc: Kumar Gala
> Signed-off-by: Thomas Abraham
> Acked-by: Viresh Kumar
> Acked-by: Nishanth Menon
> Acked-by: Lukasz Majewski
> ---
> .../devicetree/bindings/cpufreq/cpufreq-boost.txt | 38
> ++
On Thu, Apr 10, 2014 at 11:04:59AM +0100, Marc Zyngier wrote:
> On Thu, Apr 10 2014 at 10:28:24 am BST, Chanwoo Choi
> wrote:
> > This patch declare coretex-a7's irqchip to initialze gic from dt
> > with "arm,cortex-a7-gic" data.
> >
> > Cc: Thomas Gleixner
> > Signed-off-by: Chanwoo Choi
> > S
Hi,
On Mon, Mar 17, 2014 at 10:14:35PM +, Kukjin Kim wrote:
> Signed-off-by: Kukjin Kim
> Reviewed-by: Thomas Abraham
> Cc: Catalin Marinas
> ---
> arch/arm64/boot/dts/samsung-gh7.dtsi | 134
> +++
> arch/arm64/boot/dts/samsung-ssdk-gh7.dts | 26 ++
>
On Thu, Mar 20, 2014 at 05:26:06PM +, Byungho An wrote:
> From: Girish K S
>
> Added support for the EEE(Energy Efficient Ethernet) in 10G ethernet driver.
>
> Signed-off-by: Girish K S
> Neatening-by: Joe Perches
> Signed-off-by: Byungho An
> ---
> drivers/net/ethernet/samsung/sxgbe/sxg
> +Example:
> +
> + aliases {
> + ethernet0 = <&sxgbe0>;
> + };
> +
> + sxgbe0: ethernet@1a04 {
> + compatible = "samsung,sxgbe-v2.0a";
> + reg = <0 0x1a04 0 0x1>;
> + interrupt-parent = <&gic>;
> + interrupts = <0
On Wed, Mar 19, 2014 at 10:32:48PM +, Byungho An wrote:
> Mark Rutland :
> > On Tue, Mar 18, 2014 at 04:27:46PM +, Byungho An wrote:
> > > Mark Rutland :
> > > > Hi,
> > > >
> > > > As a general note it's helpful f
On Tue, Mar 18, 2014 at 04:27:46PM +, Byungho An wrote:
> Mark Rutland :
> > Hi,
> >
> > As a general note it's helpful for devicetree to be Cc'd on the entire
> series
> > (though the binding document should be a separate patch) as it provides
> u
On Fri, Mar 14, 2014 at 01:26:31AM +, Kukjin Kim wrote:
> > > > > + cpu@000 {
> > > > > + device_type = "cpu";
> > > > > + compatible = "arm,armv8";
> > > >
> > > > The "arm,armv8" should be a fallback rather than the only entry. The
> > > > p
Hi,
As a general note it's helpful for devicetree to be Cc'd on the entire
series (though the binding document should be a separate patch) as it
provides useful context for reviewing the binding.
On Tue, Mar 18, 2014 at 06:47:13AM +, Byungho An wrote:
> From: Siva Reddy
>
> This patch adds
On Mon, Mar 17, 2014 at 05:51:21AM +, Byungho An wrote:
> Mark Rutland :
> > On Wed, Mar 12, 2014 at 01:28:00PM +, Byungho An wrote:
> > > From: Siva Reddy
> > >
> > > This patch adds support for Samsung 10Gb ethernet driver(sxgbe).
> > >
>
On Fri, Mar 14, 2014 at 07:14:37AM +, Chanwoo Choi wrote:
> Hi Mark,
>
> On 03/14/2014 02:53 AM, Mark Rutland wrote:
> > On Thu, Mar 13, 2014 at 08:17:29AM +, Chanwoo Choi wrote:
> >> This patch add busfreq driver for Exynos4210/Exynos4x12 memory interface
>
On Thu, Mar 13, 2014 at 08:17:29AM +, Chanwoo Choi wrote:
> This patch add busfreq driver for Exynos4210/Exynos4x12 memory interface
> and bus to support DVFS(Dynamic Voltage Frequency Scaling) according to PPMU
> counters. PPMU (Performance Profiling Monitorings Units) of Exynos4 SoC
> provid
On Wed, Mar 12, 2014 at 04:31:56AM +, Kukjin Kim wrote:
> Mark Rutland wrote:
> >
> Hi Mark,
>
> > On Mon, Mar 10, 2014 at 10:51:17PM +, Kukjin Kim wrote:
> > > Signed-off-by: Kukjin Kim
> > > Reviewed-by: Thomas Abraham
> > > Cc: Catal
On Wed, Mar 12, 2014 at 01:28:00PM +, Byungho An wrote:
> From: Siva Reddy
>
> This patch adds support for Samsung 10Gb ethernet driver(sxgbe).
>
> - sxgbe core initialization
> - Tx and Rx support
> - MDIO support
> - ISRs for Tx and Rx
> - ifconfig support to driver
>
> Signed-off-by: Siv
On Mon, Mar 10, 2014 at 10:51:17PM +, Kukjin Kim wrote:
> Signed-off-by: Kukjin Kim
> Reviewed-by: Thomas Abraham
> Cc: Catalin Marinas
> ---
> arch/arm64/boot/dts/samsung-gh7.dtsi | 106
> +++
> arch/arm64/boot/dts/samsung-ssdk-gh7.dts | 26
> 2 f
On Thu, Feb 20, 2014 at 07:40:34PM +, Sylwester Nawrocki wrote:
> This patch adds clock provider so the the SCLK_CAM0/1 output clocks
> can be accessed by image sensor devices through the clk API.
>
> Signed-off-by: Sylwester Nawrocki
> Acked-by: Kyungmin Park
> ---
> Changes since v3:
> -
xtclk";
> + reset-gpios = <&gpf1 3 1>;
> + standby-gpios = <&gpm0 1 1>;
> + port {
> + s5c73m3_ep: endpoint {
> + remote-endpoint = <&csis0_ep>;
> +
On Thu, Feb 20, 2014 at 07:40:30PM +, Sylwester Nawrocki wrote:
> This patch documents following updates of the Exynos4 SoC camera subsystem
> devicetree binding:
> - addition of #clock-cells property to 'camera' node - the #clock-cells
>property is needed when the sensor sub-devices use c
> Signed-off-by: Kyungmin Park
> > ---
> > This patch adds missing documentation [1] for the "samsung,s5k6a3"
> > compatible. Rob, can you please merge it through your tree if it
> > looks OK ?
>
> Anyone cares to Ack this patch so it can be merged through the me
On Tue, Feb 11, 2014 at 03:16:26AM +, Kukjin Kim wrote:
> On 02/12/14 03:15, Mark Rutland wrote:
> > On Tue, Feb 11, 2014 at 06:29:41AM +, Kukjin Kim wrote:
> >> Signed-off-by: Kukjin Kim
> >> Reviewed-by: Thomas Abraham
> >> Cc: Catalin Marinas
> &g
> >> + gic: interrupt-controller@1C00 {
> >> + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> >
> > This looks incorrect -- you should at the very least have a more
> > specific one than a15-gic? Marc?
>
> "arm,cortex-a9-gic" is definitely wrong (the A9 GIC does
On Tue, Feb 11, 2014 at 06:29:41AM +, Kukjin Kim wrote:
> Signed-off-by: Kukjin Kim
> Reviewed-by: Thomas Abraham
> Cc: Catalin Marinas
> ---
> arch/arm64/boot/dts/samsung-gh7.dtsi | 108
> ++
> arch/arm64/boot/dts/samsung-ssdk-gh7.dts | 26 +++
> 2 f
On Mon, Feb 10, 2014 at 10:50:01AM +, Naveen Krishna Ch wrote:
> Hello Mark,
>
> On 10 February 2014 16:03, Mark Rutland wrote:
> > On Thu, Nov 07, 2013 at 12:42:34PM +, Naveen Krishna Chatradhi wrote:
> >> On Exynos5420 the TMU(4) for GPU has a seperate clock
On Thu, Nov 07, 2013 at 12:42:34PM +, Naveen Krishna Chatradhi wrote:
> On Exynos5420 the TMU(4) for GPU has a seperate clock enable bit from
> the other TMU channels(0 ~ 3). Hence, accessing TRIMINFO for base_second
> should be acompanied by enabling the respective clock.
>
> This patch which
r version -
> http://www.spinics.net/lists/devicetree/msg11550.html
>
> Please check this and give an ack if it is fine to be merged.
Apologies for the delay.
As far as I can tell this looks ok:
Acked-by: Mark Rutland
>
> Regards
> Arun
>
> On Fri, Dec 13, 2013 at 10:4
On Thu, Jan 23, 2014 at 05:47:25PM +, Sylwester Nawrocki wrote:
> On 23/01/14 18:41, Mark Rutland wrote:
> >>> diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
> >>> > > index 93cddeb..2da5617 100644
> >>> > > --- a/drivers/
On Thu, Jan 23, 2014 at 10:28:08AM +, Sylwester Nawrocki wrote:
> Hi,
>
> (Adding missing devicetre ML list at CC.)
>
> On 15/01/14 10:14, Naveen Krishna Chatradhi wrote:
> > This patch adds device tree support to the s5p-sss.c crypto driver.
> >
> > Also, Documentation under devicetree/bind
t; What do you think about this DT binding now, could we have your Ack ?
Other than a minor nit below, the binding looks fine to me.
With the fixed, for the binding:
Acked-by: Mark Rutland
> I think we still need to move the DT binding into a separate patch.
If you're going to post the
On Sun, Dec 01, 2013 at 10:11:47AM +, Alex Ling wrote:
> This patch adds "biu" and "ciu" clock names for exynos4412 dwmmc
> node. Without this patch, dwmmc host driver will skip enabling the
> two clocks and it will break dwmmc host function on exynos4412.
> Tested on FriendlyARM TINY4412 board
On Mon, Nov 18, 2013 at 03:22:57AM +, Naveen Krishna Ch wrote:
> Hello All,
>
> On 12 November 2013 12:07, Naveen Krishna Chatradhi
> wrote:
> > Exynos5420 has 5 TMU channels, the TRIMINFO register is
> > misplaced for TMU channels 2, 3 and 4
> > TRIMINFO at 0x1006c000 contains data for TMU c
On Fri, Sep 27, 2013 at 11:59:07AM +0100, Arun Kumar K wrote:
> The patch adds the DT binding documentation for Samsung
> Exynos5 SoC series imaging subsystem (FIMC-IS).
>
> Signed-off-by: Arun Kumar K
> Reviewed-by: Sylwester Nawrocki
> ---
> .../devicetree/bindings/media/exynos5-fimc-is.txt
On Fri, Sep 27, 2013 at 11:59:06AM +0100, Arun Kumar K wrote:
> From: Shaik Ameer Basha
>
> This patch adds support for media device for EXYNOS5 SoCs.
> The current media device supports the following ips to connect
> through the media controller framework.
[...]
> diff --git a/Documentation/d
gpios: specifier of a GPIO connected to the RESET pin
> +- clocks : should contain the sensor's EXTCLK clock specifier, from
> + the common clock bindings
I would reword this to reference clock-names so as to make the ordering
relationship explicit.
With tha
firmware must be child nodes of their corresponding ISP I2C bus controller
> node.
> +The data link of these image sensors must be specified using the common video
> +interfaces bindings, defined in video-interfaces.txt.
These don't seem to be in the example and probably should be.
Otherwise, this looks fine. With those points fixed up:
Acked-by: Mark Rutland
Thanks,
Mark.
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On Mon, Oct 28, 2013 at 06:24:17AM +, Sachin Kamat wrote:
> Update the name as per DT naming convention.
>
> Signed-off-by: Sachin Kamat
Acked-by: Mark Rutland
> ---
> .../devicetree/bindings/watchdog/samsung-wdt.txt |2 +-
> 1 file changed, 1 insertion(+), 1 del
On Wed, Oct 09, 2013 at 08:46:06PM +0100, Olof Johansson wrote:
> On Wed, Oct 9, 2013 at 1:25 AM, Mark Rutland wrote:
> > On Tue, Oct 08, 2013 at 11:15:47PM +0100, Olof Johansson wrote:
> >> [Adding Tony, who reported a mainline booting issue, and Sean who
> >>
On Tue, Oct 08, 2013 at 11:15:47PM +0100, Olof Johansson wrote:
> [Adding Tony, who reported a mainline booting issue, and Sean who
> helped me track this down]
>
> On Mon, Sep 23, 2013 at 7:15 AM, Mark Rutland wrote:
> > On Sat, Sep 21, 2013 at 04:24:59PM +0100, Tomasz F
> >> diff --git a/Documentation/devicetree/bindings/media/samsung-s5k5baf.txt
> >> b/Documentation/devicetree/bindings/media/samsung-s5k5baf.txt
> >> new file mode 100644
> >> index 000..7704a1e
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/media/samsung-s5k5baf.txt
> >> @@ -
On Tue, Sep 24, 2013 at 02:00:01PM +0100, Tomasz Figa wrote:
> Hi Mateusz, Mark,
Hi,
>
> On Monday 23 of September 2013 15:08:23 Mark Rutland wrote:
> > On Mon, Sep 23, 2013 at 02:06:48PM +0100, Mateusz Krawczuk wrote:
> > > +
> > > +Required properties:
>
On Sat, Sep 21, 2013 at 04:24:59PM +0100, Tomasz Figa wrote:
> Hi Yuvaraj,
>
> On Wednesday 18 of September 2013 15:41:53 Yuvaraj Kumar C D wrote:
> > Without the "clock-frequency" property in arch timer node, could able
> > to see the below crash dump.
> [snip]
> > diff --git a/arch/arm/boot/dts/
On Mon, Sep 23, 2013 at 02:06:48PM +0100, Mateusz Krawczuk wrote:
> This patch add clk and device tree nodes for samsung onenand driver.
>
> since v1:
> Updated Documentation according to Mark Rutland notes.
>
> Signed-off-by: Mateusz Krawczuk
> Signed-
On Fri, Sep 06, 2013 at 11:31:06AM +0100, Andrzej Hajda wrote:
> Driver for Samsung S5K5BAF UXGA 1/5" 2M CMOS Image Sensor
> with embedded SoC ISP.
> The driver exposes the sensor as two V4L2 subdevices:
> - S5K5BAF-CIS - pure CMOS Image Sensor, fixed 1600x1200 format,
> no controls.
> - S5K5BAF-
[adding lakml]
On Wed, Sep 18, 2013 at 11:11:53AM +0100, Yuvaraj Kumar C D wrote:
> Without the "clock-frequency" property in arch timer node, could able
> to see the below crash dump.
Why does this cause the below crash specifically? What is CNTFRQ reading
as?
Your firmware or bootloader should
on Arndale, one of the unused I2S
> controllers is pinmuxed with the LDO enable GPIOs for the WM1811A.
>
> Signed-off-by: Mark Brown
> ---
>
> This seems like a more robust approach to handling the externally
> visible IPs - if this is OK I can go through and do further updat
On Mon, Sep 02, 2013 at 05:21:58PM +0100, Sylwester Nawrocki wrote:
> Hi Mark,
Hi Sylwester,
>
> On 08/27/2013 11:14 AM, Mark Rutland wrote:
> >> +endpoint node
> >> +-
> >> +
> >> +- data-lanes : (optional) specifies MIPI CSI-2 data lan
On Tue, Aug 27, 2013 at 01:02:52PM +0100, Yuvaraj Kumar wrote:
> On Tue, Aug 27, 2013 at 4:31 PM, Mark Rutland wrote:
> > On Tue, Aug 27, 2013 at 10:22:31AM +0100, Yuvaraj Kumar C D wrote:
> >> This patch adds the device tree node entries for exynos5420 SOC.
> >>
On Tue, Aug 27, 2013 at 10:22:31AM +0100, Yuvaraj Kumar C D wrote:
> This patch adds the device tree node entries for exynos5420 SOC.
> Exynos5420 has a different version of DWMMC controller,so a new
> compatible string is used to distinguish it from the prior SOC's.
>
> This patch depends on
>
Hi,
[trimming down to relevant context]
> +endpoint node
> +-
> +
> +- data-lanes : (optional) specifies MIPI CSI-2 data lanes as covered in
> + video-interfaces.txt. This property can be only used to specify number
> + of data lanes, i.e. the array's content is unused, only its len
On Mon, Aug 19, 2013 at 02:18:27PM +0100, Andrzej Hajda wrote:
> Driver for Samsung S5K5BAF UXGA 1/5" 2M CMOS Image Sensor
> with embedded SoC ISP.
> The driver exposes the sensor as two V4L2 subdevices:
> - S5K5BAF-CIS - pure CMOS Image Sensor, fixed 1600x1200 format,
> no controls.
> - S5K5BAF-
On Tue, Aug 06, 2013 at 05:16:56PM +0100, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> On Saturday, August 03, 2013 09:14:11 PM Mark Rutland wrote:
> > On Fri, Aug 02, 2013 at 10:01:52PM +0100, Stephen Warren wrote:
> > > (CCing the other DT maintainers, he
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