Re: [linux-sunxi] Sd card partition for A20 booting...

2013-12-29 Thread Puneet B
Hi arete74, Thank you for your reply, i will be wait for your response. Regards Punith -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...

[linux-sunxi] [PATCH v2 2/4] ARM: dts: sun7i: external clock outputs

2013-12-29 Thread Chen-Yu Tsai
This commit adds the two external clock outputs available on A20 to its device tree. A dummy fixed factor clock is also added to serve as the first input of the clock outputs, which according to AW's A20 user manual, is the 24MHz oscillator divided by 750. Signed-off-by: Chen-Yu Tsai --- arch/ar

[linux-sunxi] [PATCH v2 4/4] ARM: dts: sun7i: Add pin muxing options for clock outputs

2013-12-29 Thread Chen-Yu Tsai
This patch adds the clock output pin options on the A20. The 2 pins can output a configurable clock to be used by external modules. This is used on the CubieTruck, to supply a 32768 Hz low power clock to the onboard Wifi+BT module. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun7i-a20.dtsi

[linux-sunxi] [PATCH v2 1/4] clk: sunxi: Allwinner A20 output clock support

2013-12-29 Thread Chen-Yu Tsai
This patch adds support for the external clock outputs on the Allwinner A20 SoC. The clock outputs are similar to "module 0" type clocks, with different offsets and widths for clock factors. Signed-off-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sun

[linux-sunxi] [PATCH v2 3/4] pinctrl: sunxi: Add Allwinner A20 clock output pin functions

2013-12-29 Thread Chen-Yu Tsai
This patch adds the clock output pin functions on the A20. The 2 pins can output a configurable clock to be used by external modules. This is used on the CubieTruck, to supply a 32768 Hz low power clock to the onboard Wifi+BT module. Signed-off-by: Chen-Yu Tsai --- drivers/pinctrl/pinctrl-sunxi-

[linux-sunxi] [PATCH v2 0/4] clk: sunxi: add A20 external output clock support

2013-12-29 Thread Chen-Yu Tsai
Hi everyone, This is a resend of A20 external output clock support patch series v2. The patch series builds upon Emilio's clock series, and adds support for external output clocks on the Allwinner A20 SoC. The outputs can be used to supply a stable clock to external modules, such as WiFi or Bluet

Re: [linux-sunxi] Re: X11+GLES broken (possibly in kernel) with 2GiB boards (Cubietruck)

2013-12-29 Thread Siarhei Siamashka
On Fri, 27 Dec 2013 08:04:49 -0800 (PST) pmsc...@gmail.com wrote: > Same problem for me :-( Thanks for reminding. This issue can be fixed by something like this: http://thread.gmane.org/gmane.comp.hardware.netbook.arm.sunxi/5480 I guess now the ball is more or less on the application develop

[linux-sunxi] [PATCH 3.4] sunxi: mali: Fix UMP on systems with 2 GiB of RAM (phys->bus issue)

2013-12-29 Thread Siarhei Siamashka
The mali driver has some code for converting between physical addresses and bus addresses (they call them "cpu physical addresses" and "physical addresses" respectively). For OS memory allocation, this delta is configured in the "cpu_usage_adjust" variable, as can be seen in the mali driver code.

[linux-sunxi] [PATCH 3.4] sunxi: Simplify and unify the __phys_to_bus/__bus_to_phys macros

2013-12-29 Thread Siarhei Siamashka
These macros are used to convert between physical addresses (as seen by the CPU) and bus addresses (as seen by various peripherals such as the display controller, cedar, g2d, mali, ...). The difference between physical and bus addresses is 0x4000, because that's the physical address of SDRAM (

Re: [linux-sunxi] Re: New sunxi-next tree with usb (ehci only), hs timers, and other stuff.

2013-12-29 Thread Maxime Ripard
Hi Hans, On Sun, Dec 22, 2013 at 01:57:34PM +0100, Hans de Goede wrote: > Hi, > > On 12/22/2013 12:21 AM, Michal Suchanek wrote: > >Actually sun7i smp conflicts badly with the sun6i smp .. so a stab at a > >merge: > > > >https://github.com/hramrach/linux-sunxi/commits/sunxi-next > > > >Compile t

[linux-sunxi] Re: [PATCH 0/4] clk: sunxi: add A20 external output clock support

2013-12-29 Thread Mike Turquette
Quoting Maxime Ripard (2013-12-29 12:59:27) > Hi Chen-Yu, > > On Mon, Dec 23, 2013 at 04:37:02PM +0800, Chen-Yu Tsai wrote: > > Hi everyone, > > > > This patch series adds support for the Allwinner A20's 2 external clock > > outputs. The CubieTruck uses one such output to supply a stable 32.768 >

[linux-sunxi] Re: [PATCH 1/4] clk: sunxi: Allwinner A20 output clock support

2013-12-29 Thread Emilio López
Hi, El 29/12/13 18:30, Mike Turquette escribió: Quoting Chen-Yu Tsai (2013-12-24 05:26:17) This patch adds support for the external clock outputs on the Allwinner A20 SoC. The clock outputs are similar to "module 0" type clocks, with different offsets and widths for clock factors. Signed-off-b

[linux-sunxi] Re: [PATCH 1/4] clk: sunxi: Allwinner A20 output clock support

2013-12-29 Thread Mike Turquette
Quoting Chen-Yu Tsai (2013-12-24 05:26:17) > This patch adds support for the external clock outputs on the > Allwinner A20 SoC. The clock outputs are similar to "module 0" > type clocks, with different offsets and widths for clock factors. > > Signed-off-by: Chen-Yu Tsai Looks good to me. Regar

Re: [linux-sunxi] Re: Upstreaming sunxi mmc support

2013-12-29 Thread Maxime Ripard
Hi Hans, On Sat, Dec 21, 2013 at 01:15:07PM +0100, Hans de Goede wrote: > >I think that adding a new factors calculation function for sun5i's > >PLL6, that would limit the factors returned to whatever frequency is > >adequate would work. Emilio? > > The problem is that the clk framework will firs

[linux-sunxi] Re: [PATCH 0/4] clk: sunxi: add A20 external output clock support

2013-12-29 Thread Maxime Ripard
Hi Chen-Yu, On Mon, Dec 23, 2013 at 04:37:02PM +0800, Chen-Yu Tsai wrote: > Hi everyone, > > This patch series adds support for the Allwinner A20's 2 external clock > outputs. The CubieTruck uses one such output to supply a stable 32.768 > KHz low power clock to its AP6210 WiFi module. Support fo