On Mon, Nov 02, 2020 at 11:19:29AM -0300, Pablo Greco wrote:
> Ethernet PHY on BananaPi M2 Berry provides RX and TX delays. Fix ethernet
> node to reflect that fact.
>
> Fixes: 27e81e1970a8 ("ARM: dts: sun8i: v40: bananapi-m2-berry: Enable GMAC
> ethernet controller")
> Signed-off-by: Pablo Greco
On Mon, Nov 02, 2020 at 11:19:14AM -0300, Pablo Greco wrote:
> DCDC1 regulator powers many different subsystems. While some of them can
> work at 3.0 V, some of them can not. For example, VCC-HDMI can only work
> between 3.24 V and 3.36 V. According to OS images provided by the board
> manufacturer
On Mon, Nov 02, 2020 at 11:16:40AM -0300, Pablo Greco wrote:
> The Ethernet PHY on the Bananapi M1 has the RX and TX delays enabled on
> the PHY, using pull-ups on the RXDLY and TXDLY pins.
>
> Fix the phy-mode description to correct reflect this so that the
> implementation doesn't reconfigure th
On 2/11/20 11:07, Maxime Ripard wrote:
Hi,
On Sat, Oct 31, 2020 at 09:34:15PM -0300, Pablo Greco wrote:
The Ethernet PHY on the Bananapi M1 has the RX and TX delays enabled on
the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that th
DCDC1 regulator powers many different subsystems. While some of them can
work at 3.0 V, some of them can not. For example, VCC-HDMI can only work
between 3.24 V and 3.36 V. According to OS images provided by the board
manufacturer this regulator should be set to 3.3 V.
Set DCDC1 and DCDC1SW to 3.3
Ethernet PHY on BananaPi M2 Berry provides RX and TX delays. Fix ethernet
node to reflect that fact.
Fixes: 27e81e1970a8 ("ARM: dts: sun8i: v40: bananapi-m2-berry: Enable GMAC
ethernet controller")
Signed-off-by: Pablo Greco
---
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 2 +-
1 file c
The Ethernet PHY on the Bananapi M1 has the RX and TX delays enabled on
the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit bbc4d71d6354 ("net: phy
On Fri, Oct 30, 2020 at 07:41:21PM +, Mark Brown wrote:
> On Fri, 30 Oct 2020 15:46:33 +0100, Clément Péron wrote:
> > This series add H6 I2S support and the I2S node missing to support
> > HDMI audio in different Allwinner SoC.
> >
> > As we first use some TDM property to make the I2S working
Hi,
On Sat, Oct 31, 2020 at 09:34:15PM -0300, Pablo Greco wrote:
> The Ethernet PHY on the Bananapi M1 has the RX and TX delays enabled on
> the PHY, using pull-ups on the RXDLY and TXDLY pins.
>
> Fix the phy-mode description to correct reflect this so that the
> implementation doesn't reconfigu
Hi Maxime,
On Mon, 2 Nov 2020 at 11:21, Maxime Ripard wrote:
>
> On Sun, Nov 01, 2020 at 04:27:05PM +0100, Clément Péron wrote:
> > On Wed, 30 Sep 2020 at 12:19, Maxime Ripard wrote:
> > >
> > > On Mon, Sep 28, 2020 at 04:27:42PM +0200, Clément Péron wrote:
> > > > On Mon, 28 Sep 2020 at 10:43,
On Fri, Oct 30, 2020 at 06:25:30PM +0100, Jernej Skrabec wrote:
> PineH64 model B contains RTL8723CS wifi+bt combo module.
>
> Since bluetooth support is not yet squared away, only wifi is enabled
> for now.
>
> Acked-by: Chen-Yu Tsai
> Signed-off-by: Jernej Skrabec
Applied, thanks!
Maxime
--
On Sun, Nov 01, 2020 at 04:27:05PM +0100, Clément Péron wrote:
> On Wed, 30 Sep 2020 at 12:19, Maxime Ripard wrote:
> >
> > On Mon, Sep 28, 2020 at 04:27:42PM +0200, Clément Péron wrote:
> > > On Mon, 28 Sep 2020 at 10:43, Maxime Ripard wrote:
> > > >
> > > > On Mon, Sep 21, 2020 at 08:37:09PM +0
On Sun, Nov 01, 2020 at 08:26:09AM +0100, Jernej Skrabec wrote:
> RX/TX delay on OrangePi One Plus board is set on PHY. Reflect that in
> ethernet node.
>
> Fixes: 7ee32a17e0d6 ("arm64: dts: allwinner: h6: orangepi-one-plus: Enable
> ethernet")
> Signed-off-by: Jernej Skrabec
Applied. It's not
On Fri, Oct 30, 2020 at 07:45:18PM -0300, Helen Koike wrote:
> On 10/23/20 2:45 PM, Paul Kocialkowski wrote:
> > The A31 MIPI CSI-2 controller is a dedicated MIPI CSI-2 controller
> > found on Allwinner SoCs such as the A31 and V3/V3s.
> >
> > It is a standalone block, connected to the CSI control
Hi
On Fri, Oct 30, 2020 at 07:44:28PM -0300, Helen Koike wrote:
> On thing that is confusing me is the name csi2 with csi (that makes me
> think of csi vesun6i-csirsion one, which is not the case), I would
> rename it to sun6i-video (or maybe it is just me who gets confused).
>
> I know this drive
15 matches
Mail list logo