Re: linux-next: build failure after merge of the aio tree

On Wed, Mar 16, 2016 at 12:02 AM, Arnd Bergmann wrote: > On Tuesday 15 March 2016 12:22:28 Benjamin LaHaise wrote: >> On Tue, Mar 15, 2016 at 04:19:02PM +, Sudip Mukherjee wrote: >> > On Tue, Mar 15, 2016 at 05:46:34PM +1100, Stephen Rothwell wrote: >> > > Hi Benjamin, >> > > >> > > After merg

[PATCH] powerpc/mm: Remove long disabled SLB code

We have a bunch of SLB related code in the tree which is there to handle dynamic VSIDs - but currently it's all disabled at compile time. The comments say "Keep that around for when we re-implement dynamic VSIDs". But that was over 10 years ago (commit 3c726f8dee6f ("[PATCH] ppc64: support 64k pag

Re: [RFC PATCH v4 0/7] vfio-pci: Allow to mmap sub-page MMIO BARs and MSI-X table

Ping. On 2016/3/7 15:48, Yongji Xie wrote: Current vfio-pci implementation disallows to mmap sub-page(size < PAGE_SIZE) MMIO BARs and MSI-X table. This is because sub-page BARs' mmio page may be shared with other BARs and MSI-X table should not be accessed directly from the guest for security r

[PATCH 2/2] powerpc: Make generic_memcpy() private to copy_32.S

generic_memcpy() is only called from copy_32.S, so there's no reason for it to be global. Reported-by: Al Viro Signed-off-by: Michael Ellerman --- arch/powerpc/lib/copy_32.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/lib/copy_32.S b/arch/powerpc/lib/copy_32

[PATCH 1/2] powerpc: Remove orphaned asm implementation of abs()

This has been unused since ~2004, remove it. Reported-by: Al Viro Signed-off-by: Michael Ellerman --- arch/powerpc/kernel/misc_32.S | 6 -- 1 file changed, 6 deletions(-) diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index be8edd67f05b..c0cd779adfc3 100644 ---

Re: powerpc/book3e-64: Use hardcoded mttmr opcode

On Tue, 2016-15-03 at 06:47:38 UTC, Scott Wood wrote: > This preserves the ability to build using older binutils (reportedly <= > 2.22). > > Signed-off-by: Scott Wood > Cc: chenhui.z...@freescale.com Applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/7a25d91214cb22e642b9ed6e44 c

Re: powerpc: Fix possible unrecoverable exception caused by '70fe3d9'

On Wed, 2016-16-03 at 02:29:30 UTC, Cyril Bur wrote: > Commit 70fe3d9 "powerpc: Restore FPU/VEC/VSX if previously used" introduces a > call to restore_math() late in the syscall return path, after MSR_RI has been > cleared. The MSR_RI flag is used to indicate whether the kernel can take > another e

Re: [v2] powerpc/8xx: Fix do_mtspr_cpu6 build on older compilers

On Tue, 2016-15-03 at 13:07:49 UTC, Christophe Leroy wrote: > Some versions of GCC, reportedly before 4.8, fail with > arch/powerpc/mm/8xx_mmu.c:139:2: error: memory input 1 is not directly > addressable > > Change the one-element array into a simple variable to avoid this. > > Signed-off-by: Chr

Re: [v3,1/8] powerpc: Create a helper for getting the kernel toc value

On Tue, 2016-03-15 at 02:27 +0100, Jiri Kosina wrote: > On Mon, 14 Mar 2016, Michael Ellerman wrote: > > > > Move the logic to work out the kernel toc pointer into a header. This is > > > a good cleanup, and also means we can use it elsewhere in future. > > > > > > Reviewed-by: Kamalesh Babulal >

Re: [PATCH] cxl: Configure the PSL for dual port CAPI on Naples

> > > + psl_dsnctl |= (phb_index << (63-11)); > > > > > > Looking at the psl docs, cappunitid in the dsndctl is bits 6 to 13. > > So > > why 11 here? > > > Because on POWER8NVL, dsndctl bit 11 == phb_index == cappunitid. > Bits 6-10 and 12-13 do not change between POWER8 and POWER8NVL

Re: [PATCH] cxl: Configure the PSL for dual port CAPI on Naples

Michael Neuling wrote: On Tue, 2016-03-15 at 15:26 +0100, Philippe Bergheaud wrote: Naples CPUs have two CAPI ports. Naples is an internal name, don't use that. Use POWER8NVL is the name we use in the kernel. alsi, it's a "chip" that has two CAPI ports, not the CPU. OK, I will rephrase.