Comment explanning the raw event code encoding for Power8 was
moved to isa207_common.h file when re-factoring the code to
support power9. But then Power9 pmu branched out due to changes
specific to power9. So move the encoding comment back to power8-pmu.c
Just comment movement and no logic change.
On Tue, 2018-05-08 at 13:50 +1000, Nicholas Piggin wrote:
> On Tue, 08 May 2018 10:41:55 +1000
> "Alastair D'Silva" wrote:
>
> > On Mon, 2018-05-07 at 20:14 +0200, Frederic Barrat wrote:
> > >
> > > Le 18/04/2018 à 03:08, Alastair D'Silva a écrit :
> > > > From: Alastair D'Silva
> > > >
> >
On Tue, 08 May 2018 10:41:55 +1000
"Alastair D'Silva" wrote:
> On Mon, 2018-05-07 at 20:14 +0200, Frederic Barrat wrote:
> >
> > Le 18/04/2018 à 03:08, Alastair D'Silva a écrit :
> > > From: Alastair D'Silva
> > >
> > > In order for a userspace AFU driver to call the Power9 specific
> > > OC
On Mon, 07 May 2018 20:36:39 +1000
Michael Ellerman wrote:
> Nicholas Piggin writes:
> > On Fri, 04 May 2018 15:16:37 +1000
> > Michael Ellerman wrote:
> >> Nicholas Piggin writes:
> >> > Use the more refined and tested event polling loop from opal_put_chars
> >> > as the fallback console
On Mon, 07 May 2018 20:35:42 +1000
Michael Ellerman wrote:
> Nicholas Piggin writes:
>
> > On Tue, 01 May 2018 19:48:58 +1000
> > Benjamin Herrenschmidt wrote:
> >
> >> On Tue, 2018-05-01 at 00:55 +1000, Nicholas Piggin wrote:
> >> > The RAW console does not need writes to be atomic, so re
On Mon, 2018-05-07 at 19:17 +0200, Frederic Barrat wrote:
>
> Le 18/04/2018 à 03:08, Alastair D'Silva a écrit :
> > From: Alastair D'Silva
> >
> > This patch adds a CPU feature bit to show whether the CPU has
> > the TIDR register available, enabling as_notify/wait in userspace.
> >
> > Signed-
On Mon, May 7, 2018 at 2:48 AM Florian Weimer wrote:
> On 05/03/2018 06:05 AM, Andy Lutomirski wrote:
> > On Wed, May 2, 2018 at 7:11 PM Ram Pai wrote:
> >
> >> On Wed, May 02, 2018 at 09:23:49PM +, Andy Lutomirski wrote:
> >>>
> If I recall correctly, the POWER maintainer did express a
On Fri, May 04, 2018 at 01:02:32PM +1000, Michael Ellerman wrote:
> Sam Bobroff writes:
>
> > diff --git a/arch/powerpc/kernel/eeh_driver.c
> > b/arch/powerpc/kernel/eeh_driver.c
> > index f63a01d336ee..b3edd0df04b8 100644
> > --- a/arch/powerpc/kernel/eeh_driver.c
> > +++ b/arch/powerpc/kernel/
On Fri, May 04, 2018 at 04:58:01PM +1000, Russell Currey wrote:
> On Wed, 2018-05-02 at 16:36 +1000, Sam Bobroff wrote:
> > As EEH event handling progresses, a cumulative result of type
> > pci_ers_result is built up by (some of) the eeh_report_*() functions
> > using either:
> > if (rc == PCI_
On Mon, 2018-05-07 at 20:14 +0200, Frederic Barrat wrote:
>
> Le 18/04/2018 à 03:08, Alastair D'Silva a écrit :
> > From: Alastair D'Silva
> >
> > In order for a userspace AFU driver to call the Power9 specific
> > OCXL_IOCTL_ENABLE_P9_WAIT, it needs to verify that it can actually
> > make that
On Mon, 2018-05-07 at 19:37 +0200, Frederic Barrat wrote:
>
> Le 18/04/2018 à 03:08, Alastair D'Silva a écrit :
> > From: Alastair D'Silva
> >
> > The current implementation of TID allocation, using a global IDR,
> > may
> > result in an errant process starving the system of available TIDs.
> >
On Mon, 2018-05-07 at 18:02 +0200, christophe lombard wrote:
>
> To answer to your questions, here is the timeline in the cxl driver
>
>1. call disable_irq()
>
>2. call plpar_hcall9() to attach a process element
> During this phase, phyp (as described in CAPI PAPR document)
>
Le 18/04/2018 à 03:08, Alastair D'Silva a écrit :
From: Alastair D'Silva
Signed-off-by: Alastair D'Silva
---
Acked-by: Frederic Barrat
Fred
Documentation/accelerators/ocxl.rst | 11 +++
1 file changed, 11 insertions(+)
diff --git a/Documentation/accelerators/ocxl.rst
b/
Le 18/04/2018 à 03:08, Alastair D'Silva a écrit :
From: Alastair D'Silva
In order for a userspace AFU driver to call the Power9 specific
OCXL_IOCTL_ENABLE_P9_WAIT, it needs to verify that it can actually
make that call.
Signed-off-by: Alastair D'Silva
---
Documentation/accelerators/ocxl.r
Le 18/04/2018 à 03:08, Alastair D'Silva a écrit :
From: Alastair D'Silva
In order to successfully issue as_notify, an AFU needs to know the TID
to notify, which in turn means that this information should be
available in userspace so it can be communicated to the AFU.
Signed-off-by: Alastair
I forgot to CC the right set of people/mailing lists on the cover
letter. Sorry. Here it is:
On Mon, May 07, 2018 at 04:20:15PM +0200, Jonathan Neuschäfer wrote:
> v1: https://www.spinics.net/lists/kernel/msg2790389.html
> https://www.spinics.net/lists/kernel/msg2790385.html
>
> In the previo
Le 18/04/2018 à 03:08, Alastair D'Silva a écrit :
From: Alastair D'Silva
The function removes the process element from NPU cache.
Signed-off-by: Alastair D'Silva
---
Acked-by: Frederic Barrat
arch/powerpc/include/asm/pnv-ocxl.h | 2 +-
arch/powerpc/platforms/powernv/ocxl.c | 4 ++
Le 18/04/2018 à 03:08, Alastair D'Silva a écrit :
From: Alastair D'Silva
The current implementation of TID allocation, using a global IDR, may
result in an errant process starving the system of available TIDs.
Instead, use task_pid_nr(), as mentioned by the original author. The
scenario descr
Le 18/04/2018 à 03:08, Alastair D'Silva a écrit :
From: Alastair D'Silva
Switch the use of TIDR on it's CPU feature, rather than assuming it
is available based on architecture.
Signed-off-by: Alastair D'Silva
---
Reviewed-by: Frederic Barrat
arch/powerpc/kernel/process.c | 6 +++---
Le 18/04/2018 à 03:08, Alastair D'Silva a écrit :
From: Alastair D'Silva
This patch adds a CPU feature bit to show whether the CPU has
the TIDR register available, enabling as_notify/wait in userspace.
Signed-off-by: Alastair D'Silva
---
arch/powerpc/include/asm/cputable.h | 3 ++-
arch/
Le 24/03/2018 à 09:14, Benjamin Herrenschmidt a écrit :
On Fri, 2018-03-23 at 17:17 +0100, christophe lombard wrote:
Le 23/03/2018 à 03:14, Benjamin Herrenschmidt a écrit :
On Thu, 2018-03-22 at 17:37 +0100, Christophe Lombard wrote:
The cxl driver cannot disable the interrupt at the device le
Le 17/04/2018 à 07:11, Vaibhav Jain a écrit :
APC virtual machines arent used on POWER-9 chips and are already
disabled in on-chip CAPP. They also need to be disabled on the PSL via
'PSL Data Send Control Register' by setting bit(47). This forces the
PSL to send commands to CAPP with queue.id ==
On Fri, May 04, 2018 at 02:38:34PM +0200, Torsten Duwe wrote:
>
> The "Power Architecture 64-Bit ELF V2 ABI" says in section 2.3.2.3:
>
> [...] There are several rules that must be adhered to in order to ensure
> reliable and consistent call chain backtracing:
>
> * Before a function calls any o
This allows access to the SD card and the BCM4318 Wifi module.
Signed-off-by: Jonathan Neuschäfer
---
Note that until some fixes in the interrupt controller drivers used on
the Wii, the SDHCI controllers will not be usable.
v2:
- Patch added to the series
---
arch/powerpc/configs/wii_defconfig
The B43 driver only needs CONFIG_SSB to support the WLAN card found in
the Wii. Configure it accordingly, and disable BCMA bus support to save
a bit of space.
Signed-off-by: Jonathan Neuschäfer
---
v2:
- Patch added to the series
---
arch/powerpc/configs/wii_defconfig | 1 +
1 file changed, 1 i
Now that there's a GPIO driver for the Wii, let's enable the following
drivers:
- the GPIO driver itself
- gpio-keys
- gpio-poweroff
- gpio-leds and a few LED triggers
Signed-off-by: Jonathan Neuschäfer
---
v2:
- Set CONFIG_NEW_LEDS=y and CONFIG_LEDS_TRIGGERS=y, without which some
of the other
The Wii doesn't have built-in Ethernet and USB Ethernet adapters are in
a different menu. Disable CONFIG_ETHERNET to save some space in support
code for Ethernet drivers.
Note that this patch doesn't disable any Ethernet drivers, because they
are not enabled by default.
Signed-off-by: Jonathan Ne
v1: https://www.spinics.net/lists/kernel/msg2790389.html
https://www.spinics.net/lists/kernel/msg2790385.html
In the previous version of patch 2, I forgot to set CONFIG_NEW_LEDS and
CONFIG_LEDS_TRIGGERS, so the more specific LED-related options weren't
actually enabled, due to Kconfig dependen
The hcall_exit() tracepoint has retval defined as unsigned long. That
leads to humours results like:
bash-3686 [009] d..2 854.134094: hcall_entry: opcode=24
bash-3686 [009] d..2 854.134095: hcall_exit: opcode=24
retval=18446744073709551609
It's normal for some hcalls to return negative
On Sun, 6 May 2018 13:10:43 -0700
Ram Pai wrote:
> On Sat, May 05, 2018 at 02:39:56PM +0200, Michal Suchánek wrote:
> > On Fri, 4 May 2018 14:45:07 -0700
> > Ram Pai wrote:
> >
> > > On Fri, May 04, 2018 at 02:31:10PM -0700, Dave Hansen wrote:
> > > > On 05/04/2018 02:26 PM, Michal Suchánek
On Mon, Apr 30, 2018 at 03:42:47PM +0200, Jonathan Neuschäfer wrote:
> Now that there's a GPIO driver for the Wii, let's enable the following
> drivers:
>
> - the GPIO driver itself
> - gpio-keys
> - gpio-poweroff
> - gpio-leds and a few LED triggers
>
> Signed-off-by: Jonathan Neuschäfer
> ---
Nicholas Piggin writes:
> On Fri, 04 May 2018 15:16:37 +1000
> Michael Ellerman wrote:
>> Nicholas Piggin writes:
>> > Use the more refined and tested event polling loop from opal_put_chars
>> > as the fallback console flush in the opal-kmsg path. This loop is used
>> > by the console driver tod
Nicholas Piggin writes:
> On Tue, 01 May 2018 19:48:58 +1000
> Benjamin Herrenschmidt wrote:
>
>> On Tue, 2018-05-01 at 00:55 +1000, Nicholas Piggin wrote:
>> > The RAW console does not need writes to be atomic, so relax
>> > opal_put_chars to be able to do partial writes, and implement an
>> >
This patch exports the accumulated power numbers of each power
sensor maintained by OCC.
Signed-off-by: Shilpasri G Bhat
---
drivers/hwmon/ibmpowernv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/hwmon/ibmpowernv.c b/drivers/hwmon/ibmpowernv.c
index 74d9b5a..0298745 100644
---
The firmware has supported for reading sensor values of size u32.
This patch adds support to use newer firmware functions which allows
to read the sensors of size u64.
Signed-off-by: Shilpasri G Bhat
---
drivers/hwmon/ibmpowernv.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
dif
This patch adds support to read 64-bit sensor values. This method is
used to read energy sensors and counters which are of type u64.
Signed-off-by: Shilpasri G Bhat
---
arch/powerpc/include/asm/opal-api.h| 1 +
arch/powerpc/include/asm/opal.h| 2 +
arch/powerpc/plat
This patch series provides support for adding energy sensors to
ibmpowernv-hwmon driver. This patch adds support to read 64bit
sensor values.
Shilpasri G Bhat (3):
powernv: opal-sensor: Add support to read 64bit sensor values
hwmon: (ibmpowernv): Add support to read 64 bit sensors
hwmon: (ib
On Mon, 7 May 2018 09:46:43 +0900
Masahiro Yamada wrote:
> Hi Nicholas,
>
> 2018-04-20 19:41 GMT+09:00 Nicholas Piggin :
> > On Fri, 20 Apr 2018 12:00:49 +0200
> > Mathieu Malaterre wrote:
> >
> >> On Fri, Apr 20, 2018 at 9:34 AM, Nicholas Piggin
> >> wrote:
> >> > This requires further c
On Mon, 7 May 2018 14:25:12 +0900
Masahiro Yamada wrote:
> Hi.
>
>
> 2018-04-30 10:23 GMT+09:00 Nicholas Piggin :
> > The powerpc toolchain can compile combinations of 32/64 bit and
> > big/little endian, so it's convenient to consider, e.g.,
> >
> > CC -m64 -mbig-endian
> >
> > To be the C c
On 05/03/2018 01:38 AM, Ram Pai wrote:
This is a new requirement that I was not aware off. Its not documented
anywhere AFAICT.
Correct. All inheritance behavior was deliberately left unspecified.
I'm surprised about the reluctance to fix the x86 behavior. Are there
any applications at all f
On Mon, 7 May 2018 15:15:26 +1000
Paul Mackerras wrote:
> On Sun, May 06, 2018 at 05:37:27PM +1000, Nicholas Piggin wrote:
> > Implement a local TLB flush for invalidating an LPID with variants for
> > process or partition scope. And a global TLB flush for invalidating
> > a partition scoped page
On 05/07/2018 04:30 AM, Michael Ellerman wrote:
> Benjamin Herrenschmidt writes:
>> On Fri, 2018-05-04 at 20:42 +1000, Michael Ellerman wrote:
>>> Cédric Le Goater writes:
>>>
This is not the case for the moment, but future releases of pHyp might
need to introduce some synchronisation r
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