[Mesa-dev] [PATCH v3 2/2] etnaviv: Add support for ETC2 texture compression

From: "Wladimir J. van der Laan" Add support for ETC2 compressed textures in the etnaviv driver. One step closer towards GL ES 3 support. For now, treat SRGB and RGB formats the same. It looks like these are distinguished using a different bit in sampler state, and not part of the format, but I

[Mesa-dev] [PATCH v3 1/2] gallium/util: Implement util_format_is_etc

From: "Wladimir J. van der Laan" This is the equivalent of util_format_is_s3tc, but for ETC. Signed-off-by: Wladimir J. van der Laan --- src/gallium/auxiliary/util/u_format.h | 13 + 1 file changed, 13 insertions(+) diff --git a/src/gallium/auxiliary/util/u_format.h b/src/gallium

[Mesa-dev] [PATCH v3 0/2] etnaviv: Add support for ETC2 texture compression

From: "Wladimir J. van der Laan" Add support for ETC2 compressed textures in the etnaviv driver. One step closer towards GL ES 3 support. For now, treat SRGB and RGB formats the same. It looks like these are distinguished using a different bit in sampler state, and not part of the format, but I

Re: [Mesa-dev] [PATCH 3/4] docs: avoid overwrite of LD_LIBRARY_PATH during basic testing

On 15 July 2017 at 17:01, Andres Gomez wrote: > On Mon, 2017-07-10 at 12:19 +0100, Emil Velikov wrote: >> On 8 July 2017 at 20:59, Andres Gomez wrote: >> > The LD_LIBRARY_PATH environment variable could be already defined so >> > we extend it and restore it rather than just overwriting it. >> > >

Re: [Mesa-dev] egl: propagate EGL_BAD_ATTRIBUTE during EGLImage attr parsing

On Thursday, 2017-07-13 20:04:33 +0100, Emil Velikov wrote: > From: Emil Velikov > > Earlier commit refactored/split the parsing into separate hunks. > While no functional change was intended, it did not attribute that > different error is set when the attrib. value is incorrect. > > Fixes: 3ee

Re: [Mesa-dev] [PATCH] anv/image: Fix VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT

On 18/07/17 05:07, Jason Ekstrand wrote: On Mon, Jul 17, 2017 at 5:18 PM, Chad Versace mailto:chadvers...@chromium.org>> wrote: On Tue 18 Jul 2017, Lionel Landwerlin wrote: > Oh dear :/ > > Reviewed-by: Lionel Landwerlin mailto:lionel.g.landwer...@intel.com>> > > On 17/0

Re: [Mesa-dev] [PATCH v2] etnaviv: Add support for ETC2 texture compression

> h (format) { > > How about > > const struct util_format_description *desc = util_format_description(format); > return desc->layout == UTIL_FORMAT_LAYOUT_ETC; I intentionally exclude PIPE_FORMAT_ETC1_RGB8 here because it is implemented on older hw and has its own feature bit (ETC1_TEXTURE_COMPRES

[Mesa-dev] [PATCH 21/22] i965: Drop redundant check for non-tiled depth buffer

Depth buffers are always Y-tiled. In brw_miptree_choose_tiling() driver opts to use linear buffers for small and 1D but this does not apply for depth - GL_DEPTH_COMPONENT and GL_DEPTH_STENCIL_EXT are considered first. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_misc_state.c

[Mesa-dev] [PATCH 18/22] i965/miptree: Prepare aux state map for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 21 ++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index d96f5c7938..fafd0c1e59

[Mesa-dev] [PATCH 16/22] i965/miptree: Represent w-tiled stencil surfaces with isl

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen7_misc_state.c | 20 +- src/mesa/drivers/dri/i965/gen8_depth_state.c | 26 ++ src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 38 --- 3 files changed, 38 insertions(+), 46 delet

[Mesa-dev] [PATCH 19/22] i965/miptree: Prepare 3D surfaces with physical 2D layout

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 39 +++ 1 file changed, 22 insertions(+), 17 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index fafd0c1e59..702d

[Mesa-dev] [PATCH 20/22] intel/isl/gen4: Represent cube maps with 3D layout

Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl.c | 40 +++- 1 file changed, 35 insertions(+), 5 deletions(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 12ffe3bb51..90b36c33bc 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @

[Mesa-dev] [PATCH 17/22] i965/miptree: Represent y-tiled stencil copies with isl

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index adaa6a94ab..d96f5c7938 100644 --- a/s

[Mesa-dev] [PATCH 22/22] i965: Represent depth surfaces with isl

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_clear.c | 5 +- src/mesa/drivers/dri/i965/gen8_depth_state.c | 3 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 136 +- 3 files changed, 97 insertions(+), 47 deletions(-) diff --git a/src/

[Mesa-dev] [PATCH 14/22] i965/miptree: Add support for imported bo offsets for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 13 + 1 file changed, 13 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 879036ce77..a0b129adb4 100644 --- a/src/mesa/dr

[Mesa-dev] [PATCH 10/22] i965: Refactor miptree to isl converter and adjustment

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 103 +-- 1 file changed, 57 insertions(+), 46 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index a8c40d54d8

[Mesa-dev] [PATCH 09/22] i965: Prepare tex (sub)image for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_tex_image.c| 20 src/mesa/drivers/dri/i965/intel_tex_subimage.c | 8 +++- 2 files changed, 23 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drive

[Mesa-dev] [PATCH 13/22] i965/fbo: Add support for isl-based miptrees in rb wrapper

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_fbo.c | 4 1 file changed, 4 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index 1fa40bb5c9..fee4b6fa8c 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.c +++ b/sr

[Mesa-dev] [PATCH 08/22] i965/wm: Prepare image surfaces for isl based

There is a functional change: Before update_image_surface() didn't shift the number of layers for 3D, now it does like update_texture_image_param() did. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 22 +++--- 1 file changed, 19 insertions

[Mesa-dev] [PATCH 15/22] i965/miptree: Prepare compressed offsets for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 9 + 1 file changed, 9 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index a0b129adb4..1b8c0da80d 100644 --- a/src/mesa/drivers/

[Mesa-dev] [PATCH 04/22] i965/miptree: Switch to isl_surf::row_pitch

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_misc_state.c | 2 +- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 +- src/mesa/drivers/dri/i965/gen6_depth_state.c | 2 +- src/mesa/drivers/dri/i965/gen7_misc_state.c | 4 +- src/mesa/drivers/dri/i965/gen

[Mesa-dev] [PATCH 03/22] i965/miptree: Switch to isl_surf::tiling

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_misc_state.c | 8 +-- src/mesa/drivers/dri/i965/brw_tex_layout.c | 28 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 10 +-- src/mesa/drivers/dri/i965/gen6_depth_state.c | 2 +- src/mesa/drivers/dri/

[Mesa-dev] [PATCH 06/22] i965: Prepare blit engine for isl based miptrees

v2: Do not concern cpp, pitch and tiling which are already transitioned. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_blit.c | 16 +++- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers

[Mesa-dev] [PATCH 12/22] i965: Prepare image setup from miptree for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_screen.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 7a92ef601b..9c74d2aa54 100644 --- a/src/mesa/driv

[Mesa-dev] [PATCH 11/22] i965: Prepare tex, img and rt state emission for isl based miptrees

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 3f2ca82fdb..45

[Mesa-dev] i965: Transition depth and stencil surfaces to isl

First four patches are mechanical replacing intel_mipmap_tree native members with equivalent found in intel_mipmap_tree::surf. This helps to reduce back and forth churn, i.e., helps to avoid number of "if (mt->surf.size > 0)"-conditionals that would get dropped in the end. Assumption is that this m

[Mesa-dev] [PATCH 07/22] i965/miptree: Prepare intel_miptree_copy() for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_blit.c | 20 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index 476cc5..68e9c1ad16 100644 --- a/src/mesa/

[Mesa-dev] [PATCH 01/22] i965/miptree: Switch to isl_surf::msaa_layout

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 3 +- src/mesa/drivers/dri/i965/brw_tex_layout.c| 9 ++- src/mesa/drivers/dri/i965/brw_wm.c| 2 +- src/mesa/drivers/dri/i965/intel_fbo.c | 13 +--- src/mesa/drivers/dri/i965/intel_mipmap

[Mesa-dev] [PATCH 02/22] i965/miptree: Switch to isl_surf::samples

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c| 16 - src/mesa/drivers/dri/i965/brw_context.c | 2 +- src/mesa/drivers/dri/i965/brw_meta_util.c| 2 +- src/mesa/drivers/dri/i965/brw_tex_layout.c | 4 +-- src/mesa/drivers/dri/

[Mesa-dev] [PATCH 05/22] i965/miptree: Store chars-per-pixel even for isl based

This will significantly reduce chrun when switching remaaining surface types to isl. After the full transition it will be easier to calculate on-demand and drop the helper member in miptree. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 1 + 1 file changed,

Re: [Mesa-dev] [PATCH 4/4] dri: Add KHR_no_error toggle to driconf

On 2017-07-17 19:21, Emil Velikov wrote: On 13 July 2017 at 12:09, Grigori Goronzy wrote: On 2017-07-12 15:15, Emil Velikov wrote: As mentioned in earlier commit no_error should be device agnostic. Hence removing the st/dri bits and adding a DRI_CONF_MESA_NO_ERROR() line next to DRI_CONF_VBLA

[Mesa-dev] [PATCH] egl/dri2: remove unused buffer_count variable

It removes unused buffer_count variable from dri2_egl_surface. And it polishes the assert of dri2_drm_get_buffers_with_format(). Signed-off-by: Mun Gwan-gyeong --- src/egl/drivers/dri2/egl_dri2.h | 1 - src/egl/drivers/dri2/platform_android.c | 5 + src/egl/drivers/dri2/platform_drm.

Re: [Mesa-dev] [PATCH] radeonsi: add back the USE_MININUM_PRIORITY flag to the low-prio compiler queue

Reviewed-by: Samuel Pitoiset On 07/17/2017 11:56 PM, Marek Olšák wrote: From: Marek Olšák Accidentally removed in 9f320e0a387a1009c5218daf130b3b754a3c2800. --- src/gallium/drivers/radeonsi/si_pipe.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/r

[Mesa-dev] [v2 8/16] i965/wm: Use isl for filling tex image parameters

This helps to drop dependency to miptree::total_height which is used in brw_miptree_get_vertical_slice_pitch(). CC: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 2 +- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 100 --

[Mesa-dev] [7.5/16] intel/isl: Take 3D surfaces into account in image params

CC: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl_storage_image.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/intel/isl/isl_storage_image.c b/src/intel/isl/isl_storage_image.c index 4c56e787b5..a8aebce6d4 100644 --- a/src/intel/isl/isl_

[Mesa-dev] [PATCH] gallium: auxiliary: Fix standalone Android build of u_cpu_detect (v2)

Commit 463b7d0332c5("gallium: Enable ARM NEON CPU detection.") introduced CPU feature detection based Android cpufeatures library. Unfortunately it also added an assumption that if PIPE_OS_ANDROID is defined, the library is also available, which is not true for the standalone build without using An

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