On Thu, 2019-01-17 at 13:55 -0600, Jason Ekstrand wrote:
> On Tue, Jan 15, 2019 at 7:54 AM Iago Toral Quiroga > wrote:
> > v2:
> >
> > - make 16-bit be its own separate case (Jason)
> >
> >
> >
> > Reviewed-by: Topi Pohjolainen
> >
&g
and just give the whole thing
> the title "Handle extended math restrictions for half-float" with a
> detailed message describing what all we have to handle. If you want
> to keep it as two patches, that's fine but unnecessary.
>
>
> On Tue, Jan 15, 2019 at 7:54 AM I
s.
On Thu, 2019-01-17 at 14:04 -0600, Jason Ekstrand wrote:
> Again, please squash with the previous patch. Splitting stuff this
> granular just makes review harder.
>
> On Tue, Jan 15, 2019 at 7:54 AM Iago Toral Quiroga > wrote:
> > Reviewed-by: Jason Ekstrand
> &
85481845#fails
> >
> > I'll revert it as soon as my testing completes.
> >
> > Iago Toral Quiroga writes:
> >
> > > We had defined MAX_IMAGES as 8, which we used to size the array
> > > for
> > > image push constant data. The comment there stated
On Thu, 2019-01-17 at 14:14 -0600, Jason Ekstrand wrote:
> On Tue, Jan 15, 2019 at 7:55 AM Iago Toral Quiroga > wrote:
> > We are now using these bits, so don't assert that they are not set,
> > just
> >
> > avoid compaction in that case.
> >
&g
On Thu, 2019-01-17 at 14:16 -0600, Jason Ekstrand wrote:
> On Tue, Jan 15, 2019 at 7:54 AM Iago Toral Quiroga > wrote:
> > We open coded this in a couple of places, so a helper function is
> > probably
> >
> > sensible. Plus it makes it more consistent with t
On Thu, 2019-01-17 at 14:18 -0600, Jason Ekstrand wrote:
> On Tue, Jan 15, 2019 at 7:55 AM Iago Toral Quiroga > wrote:
> > Source0 and Destination extract the floating-point precision
> > automatically
> >
> > from the SrcType and DstType instruction fields
On Thu, 2019-01-17 at 17:16 -0600, Jason Ekstrand wrote:
> On Tue, Jan 15, 2019 at 7:54 AM Iago Toral Quiroga > wrote:
> > The changes in this version address review feedback to v2 and, most
> > importantly,
> >
> > rebase on top of relevant changes in master, spec
On Thu, 2019-01-17 at 17:12 -0600, Jason Ekstrand wrote:
> This patch doesn't really do what the commit message says. What it
> really does is implement float -> 8-bit converions for *any* size
> float.
>
> On Tue, Jan 15, 2019 at 7:55 AM Iago Toral Quiroga > wrote:
On Thu, 2019-01-17 at 18:18 -0600, Jason Ekstrand wrote:
> On Tue, Jan 15, 2019 at 7:55 AM Iago Toral Quiroga > wrote:
> > Reviewed-by: Topi Pohjolainen
> >
> > ---
> >
> > .../compiler/brw_fs_combine_constants.cpp | 60
> > +++--
ot 4 or 5 tricky ones left. By and large, I think things
> are looking really good. I don't know that we'll make 19.0 but
> there's a possibility. If not, it'll likely land shortly after.
>
> On Tue, Jan 15, 2019 at 7:54 AM Iago Toral Quiroga > wrote:
>
On Fri, 2019-01-18 at 12:13 +0100, Iago Toral wrote:
> On Thu, 2019-01-17 at 17:12 -0600, Jason Ekstrand wrote:
> > This patch doesn't really do what the commit message says. What it
> > really does is implement float -> 8-bit converions for *any* size
> > float.
>
On Fri, 2019-01-18 at 06:46 -0600, Jason Ekstrand wrote:
> On January 18, 2019 01:48:25 Iago Toral wrote:
>
> > On Thu, 2019-01-17 at 13:42 -0600, Jason Ekstrand wrote:
> > > On Tue, Jan 15, 2019 at 7:54 AM Iago Toral Quiroga <
> > > ito...@igalia.com> wrote
On Fri, 2019-01-18 at 06:54 -0600, Jason Ekstrand wrote:
>
>
>
>
>
> On January 18, 2019 04:47:51 Iago Toral wrote:
> > On Thu, 2019-01-17 at 14:18 -0600, Jason Ekstrand wrote:
> > > On Tue, Jan 15, 2019 at 7:55 AM Iago Toral Quiroga <
> > >
On Fri, 2019-01-18 at 11:51 -0600, Jason Ekstrand wrote:
> On Tue, Jan 15, 2019 at 7:55 AM Iago Toral Quiroga > wrote:
> > Broadwell hardware has a bug that manifests in SIMD8 executions of
> >
> > 16-bit MAD instructions when any of the sources is a Y or W
> > com
split instructions in the SIMD
width lowering pass.
> I think it's *mostly* a no-op there. I'll have to think on this one
> a bit more. Don't wait to re-send the v4 until I've come up with
> something.
>
> On Tue, Jan 15, 2019 at 7:55 AM Iago Toral Quiro
anything, please let me know.
>
> On Fri, Jan 18, 2019 at 5:37 AM Iago Toral wrote:
> > Thanks a lot of for all the review work! When you're done reviewing
> > all the patches I'll prepare a v4 with all the changes.
> > On Thu, 2019-01-17 at 18:24 -0600, Jason E
On Mon, 2019-01-21 at 18:48 -0600, Jason Ekstrand wrote:
> On Mon, Jan 21, 2019 at 4:55 AM Iago Toral wrote:
> > On Fri, 2019-01-18 at 11:51 -0600, Jason Ekstrand wrote:
> > > On Tue, Jan 15, 2019 at 7:55 AM Iago Toral Quiroga <
> > > ito...@igalia.com> wrote:
>
On Tue, 2019-01-22 at 16:18 -0800, Matt Turner wrote:
> On Tue, Jan 15, 2019 at 5:54 AM Iago Toral Quiroga > wrote:
> >
> > 3-src instructions don't support immediates, but since
> > 36bc5f06dd22,
> > we allow them on MAD and LRP relying on the combine consta
On Tue, 2019-01-22 at 16:36 -0800, Matt Turner wrote:
> On Tue, Jan 15, 2019 at 5:54 AM Iago Toral Quiroga > wrote:
> >
> > We use ALign16 mode for this, since it is more convenient, but the
> > PRM
> > for Broadwell states in Volume 3D Media GPGPU, Chapter 'R
On Tue, 2019-01-22 at 15:46 -0800, Matt Turner wrote:
> On Tue, Jan 15, 2019 at 5:55 AM Iago Toral Quiroga > wrote:
> >
> > This is available since gen8.
> >
> > v2: restore previously existing assertion.
> >
> > Reviewed-by: Topi Pohjola
On Wed, 2019-01-23 at 06:03 -0800, Francisco Jerez wrote:
> Iago Toral Quiroga writes:
>
> > Commit c84ec70b3a72 implemented execution type promotion to 32-bit
> > for
> > conversions involving half-float registers, which empirical testing
> > suggested
&g
On Thu, 2019-01-24 at 11:45 -0800, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Wed, 2019-01-23 at 06:03 -0800, Francisco Jerez wrote:
> > > Iago Toral Quiroga writes:
> > >
> > > > Commit c84ec70b3a72 implemented execution typ
On Thu, 2019-01-24 at 10:22 -0800, Matt Turner wrote:
> On Wed, Jan 23, 2019 at 4:18 AM Iago Toral Quiroga > wrote:
> >
> > Commit c84ec70b3a72 implemented execution type promotion to 32-bit
> > for
> > conversions involving half-float registers, which empirical
oughly unit tested because
> > false
> > + * results it will lead developers astray, which is worse than
> > having no
>
> Redundant "it".
>
> > + * validator at all. Patches to this file without corresponding
> > unit tests (in
> > +
ery
> interesting) and only on Sandy Bridge and earlier hardware. Just get
> rid of it and inline it in the one place that it's actually used.
>
> Cc: Iago Toral Quiroga
> ---
> src/intel/compiler/brw_fs.cpp | 29 +++--
> src/intel/compiler/brw_i
On Fri, 2019-01-25 at 12:54 -0800, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Thu, 2019-01-24 at 11:45 -0800, Francisco Jerez wrote:
> > > Iago Toral writes:
> > >
> > > > On Wed, 2019-01-23 at 06:03 -0800, Francisco Jerez w
On Thu, 2019-01-17 at 18:18 -0600, Jason Ekstrand wrote:
> On Tue, Jan 15, 2019 at 7:55 AM Iago Toral Quiroga > wrote:
> > Reviewed-by: Topi Pohjolainen
> >
> > ---
> >
> > .../compiler/brw_fs_combine_constants.cpp | 60
> > +++--
On Tue, 2019-01-29 at 07:20 -0800, Jason Ekstrand wrote:
>
>
>
>
>
> On January 29, 2019 05:27:50 Iago Toral wrote:
> > On Thu, 2019-01-17 at 18:18 -0600, Jason Ekstrand wrote:
> > > On Tue, Jan 15, 2019 at 7:55 AM Iago Toral Quiroga <
> > >
On Fri, 2019-01-25 at 12:54 -0800, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Thu, 2019-01-24 at 11:45 -0800, Francisco Jerez wrote:
> > > Iago Toral writes:
> > >
> > > > On Wed, 2019-01-23 at 06:03 -0800, Francisco Jerez w
On Fri, 2019-02-01 at 12:34 +0100, Iago Toral wrote:
> On Fri, 2019-01-25 at 12:54 -0800, Francisco Jerez wrote:
> > Iago Toral writes:
> >
> > > On Thu, 2019-01-24 at 11:45 -0800, Francisco Jerez wrote:
> > > > Iago Toral writes:
> > > >
> &
On Fri, 2019-02-01 at 11:23 -0800, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Fri, 2019-01-25 at 12:54 -0800, Francisco Jerez wrote:
> > > Iago Toral writes:
> > >
> > > > On Thu, 2019-01-24 at 11:45 -0800, Francisco
On Mon, 2019-02-04 at 08:50 +0100, Iago Toral wrote:
> On Fri, 2019-02-01 at 11:23 -0800, Francisco Jerez wrote:
> > Iago Toral writes:
> >
> > > On Fri, 2019-01-25 at 12:54 -0800, Francisco Jerez wrote:
> > > > Iago Toral writes:
> > > >
> &
On Tue, 2019-02-12 at 08:43 -0600, Jason Ekstrand wrote:
> On February 12, 2019 05:57:09 Iago Toral Quiroga
> wrote:
>
> > v2:
> > - Merge Float16 and Int8 capabilities into a single patch (Jason)
> > - Merged patch that enabled SPIR-V front-end checks for these c
On Thu, 2019-02-14 at 16:59 -0600, Jason Ekstrand wrote:
> On Tue, Feb 12, 2019 at 5:56 AM Iago Toral Quiroga > wrote:
> > Some conversions are not directly supported in hardware and need to
> > be
> >
> > split in two conversion instructions going th
On Sat, 2019-02-16 at 09:02 -0600, Jason Ekstrand wrote:
> On Tue, Feb 12, 2019 at 5:56 AM Iago Toral Quiroga > wrote:
> > Empirical testing shows that gen8 has a bug where MAD instructions
> > with
> >
> > a half-float source starting at a non-zero offset fai
On Sat, 2019-02-16 at 09:29 -0600, Jason Ekstrand wrote:
> On Tue, Feb 12, 2019 at 5:57 AM Iago Toral Quiroga > wrote:
> > At the very least we need it to handle HF too, since we are doing
> >
> > constant propagation for MAD and LRP, which relies on this pass
> >
On Sat, 2019-02-16 at 09:40 -0600, Jason Ekstrand wrote:
> On Tue, Feb 12, 2019 at 11:53 AM Iago Toral Quiroga <
> ito...@igalia.com> wrote:
> > ---
> >
> > src/intel/compiler/brw_eu_validate.c| 64 -
> >
> > src
On Sat, 2019-02-16 at 09:42 -0600, Jason Ekstrand wrote:
> On Tue, Feb 12, 2019 at 5:56 AM Iago Toral Quiroga > wrote:
> > ---
> >
> > src/intel/compiler/brw_eu_validate.c| 10 +-
> >
> > src/intel/compiler/test_eu_validate.cpp | 46
> > +
just need to convince myself that it doesn't make the compiler
> significantly more bogus than it already is today.
>
> On Tue, Feb 12, 2019 at 5:57 AM
> Iago Toral Quiroga wrote:
> > The changes in this version address review feedback to v3. The most
> > significan
We are now lowering isign in NIR so this patch is no longer needed.
Iago
On Tue, 2019-02-12 at 12:55 +0100, Iago Toral Quiroga wrote:
> Reviewed-by: Jason Ekstrand
> ---
> src/intel/compiler/brw_fs_nir.cpp | 25 +
> 1 file changed, 21 insertions(+),
ns aren't my strongest
> area.
>
>
> On Tue, Feb 12, 2019 at 5:56 AM Iago Toral Quiroga > wrote:
> > The section 'Execution Data Types' of 3D Media GPGPU volume, which
> >
> > describes execution types, is exactly the same in BDW and SKL+.
> &g
On Tue, 2019-02-26 at 13:55 -0800, Francisco Jerez wrote:
> Iago Toral Quiroga writes:
>
> > The section 'Execution Data Types' of 3D Media GPGPU volume, which
> > describes execution types, is exactly the same in BDW and SKL+.
> >
> > Also, this section
On Tue, 2019-02-26 at 14:54 -0800, Francisco Jerez wrote:
> Iago Toral Quiroga writes:
>
> > ---
> > src/intel/compiler/brw_eu_validate.c| 64 -
> > src/intel/compiler/test_eu_validate.cpp | 122
> >
> > 2 files ch
On Tue, 2019-02-26 at 15:50 -0800, Francisco Jerez wrote:
> Iago Toral Quiroga writes:
>
> > ---
> > src/intel/compiler/brw_eu_validate.c| 10 +-
> > src/intel/compiler/test_eu_validate.cpp | 46
> > +
> > 2 files c
On Wed, 2019-02-27 at 13:47 -0800, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Tue, 2019-02-26 at 14:54 -0800, Francisco Jerez wrote:
> > > Iago Toral Quiroga writes:
> > >
> > > > ---
> > > > src/intel/compiler/brw_eu_validat
On Wed, 2019-02-27 at 15:44 -0800, Francisco Jerez wrote:
> Iago Toral Quiroga writes:
>
> > The section 'Execution Data Types' of 3D Media GPGPU volume, which
> > describes execution types, is exactly the same in BDW and SKL+.
> >
> > Also, this section
On Wed, 2019-02-27 at 17:04 -0800, Ian Romanick wrote:
> On 2/27/19 4:45 AM, Iago Toral Quiroga wrote:
> > Now that we propagate constants to the first source of 2src
> > instructions we
> > see more opportunities of constant folding in the backend.
> >
&
On Wed, 2019-02-27 at 17:04 -0800, Ian Romanick wrote:
> On 2/27/19 4:45 AM, Iago Toral Quiroga wrote:
> > Now that we propagate constants to the first source of 2src
> > instructions we
> > see more opportunities of constant folding in the backend.
> >
&
On Thu, 2019-02-28 at 09:54 -0800, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Wed, 2019-02-27 at 13:47 -0800, Francisco Jerez wrote:
> > > Iago Toral writes:
> > >
> > > > On Tue, 2019-02-26 at 14:54 -0800, Francisco Jerez w
On Fri, 2019-03-01 at 09:39 +0100, Iago Toral wrote:
> On Thu, 2019-02-28 at 09:54 -0800, Francisco Jerez wrote:
> > Iago Toral writes:
> >
> > > On Wed, 2019-02-27 at 13:47 -0800, Francisco Jerez wrote:
> > > > Iago Toral writes:
> > > >
> &
On Fri, 2019-03-01 at 19:04 -0800, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Thu, 2019-02-28 at 09:54 -0800, Francisco Jerez wrote:
> > > Iago Toral writes:
> > >
> > > > On Wed, 2019-02-27 at 13:47 -0800, Francisco
On Thu, 2019-02-28 at 16:20 -0800, Ian Romanick wrote:
> On 2/28/19 4:47 AM, Iago Toral wrote:
> > On Wed, 2019-02-27 at 17:04 -0800, Ian Romanick wrote:
> > > On 2/27/19 4:45 AM, Iago Toral Quiroga wrote:
> > > > Now that we propagate constants to the first source o
On Mon, 2019-03-04 at 15:36 -0800, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Fri, 2019-03-01 at 19:04 -0800, Francisco Jerez wrote:
> > > Iago Toral writes:
> > >
> > > > On Thu, 2019-02-28 at 09:54 -0800, Francisco
On Tue, 2019-03-05 at 07:35 +0100, Iago Toral wrote:
> On Mon, 2019-03-04 at 15:36 -0800, Francisco Jerez wrote:
> > Iago Toral writes:
> >
> > > On Fri, 2019-03-01 at 19:04 -0800, Francisco Jerez wrote:
> > > > Iago Toral writes:
> > > >
> &
On Wed, 2019-03-06 at 09:21 +0100, Iago Toral wrote:
> On Tue, 2019-03-05 at 07:35 +0100, Iago Toral wrote:
> > On Mon, 2019-03-04 at 15:36 -0800, Francisco Jerez wrote:
> > > Iago Toral writes:
> > >
> > > > On Fri, 2019-03-01 at 19:04 -0800, Francisco Je
On Tue, 2019-03-12 at 15:44 -0700, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Tue, 2019-03-05 at 07:35 +0100, Iago Toral wrote:
> > > On Mon, 2019-03-04 at 15:36 -0800, Francisco Jerez wrote:
> > > > Iago Toral writes:
> > > >
> >
On Tue, 2019-03-12 at 15:46 -0700, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Wed, 2019-03-06 at 09:21 +0100, Iago Toral wrote:
> > > On Tue, 2019-03-05 at 07:35 +0100, Iago Toral wrote:
> > > > On Mon, 2019-03-04 at 15:36 -0800, Francisco Jerez wr
Reviewed-by: Iago Toral Quiroga
On Tue, 2015-09-01 at 16:41 +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> We don't need to use the 3d image address here as that will
> include SKIP_IMAGES, and we are only blitting a single
> 2D anyways, so just use the 2D path.
>
&
Reviewed-by: Iago Toral Quiroga
On Tue, 2015-09-01 at 16:41 +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> The CTS packed_pixels test checks that readpixels doesn't write
> into the space between rows, however we fail that here unless
> we check the format and stride mat
shuoldn't match.
Typo in shouldn't
> align the rowlength to the pack alignment before comparing.
Reviewed-by: Iago Toral Quiroga
BTW, it seems that at least _mesa_texstore_rgb_fxt1 in
texcompress_fxt1.c has the same issue, right?
> This fixes compressed cases in CTS packe
Hi Curro,
I have been a couple of weeks on holidays and have just come back to
this:
On Thu, 2015-08-06 at 18:27 +0300, Francisco Jerez wrote:
> Iago Toral Quiroga writes:
>
> > If we have spilled/unspilled a register in the current instruction, avoid
> > emitting uns
On Thu, 2015-07-30 at 16:13 +0300, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Thu, 2015-07-30 at 15:58 +0300, Francisco Jerez wrote:
> >> Iago Toral Quiroga writes:
> >>
> >> > ---
> >> > src/mesa/drivers/dri/i965/brw_fs_reg
const char *name)
You also want to remove the reference to 'name_as_gs_input' in the
comment right above this function too.
Other than this,
Reviewed-by: Iago Toral Quiroga
> {
> switch (state->stage) {
> case MESA_SHADER_TESS_CTRL:
> @@ -1094,7 +1092,7 @@ void
Both patches do what they advertise and seem to work, so they are
Reviewed-by: Iago Toral Quiroga
That said, I imagine that probably you want to get at least a few ACKs
from other devs, like Illia did, to make sure that your changes have
enough support.
Iago
On Wed, 2015-09-02 at 02:26 +0200
On Wed, 2015-09-02 at 14:29 +0300, Francisco Jerez wrote:
> Iago Toral writes:
>
> > Hi Curro,
> >
> > I have been a couple of weeks on holidays and have just come back to
> > this:
> >
> > On Thu, 2015-08-06 at 18:27 +0300, Francisco Jerez wrote:
> &
On Wed, 2015-09-02 at 17:53 +0300, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Wed, 2015-09-02 at 14:29 +0300, Francisco Jerez wrote:
> >> Iago Toral writes:
> >>
> >> > Hi Curro,
> >> >
> >> > I have been a
On Wed, 2015-09-02 at 14:32 +0300, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Thu, 2015-07-30 at 16:13 +0300, Francisco Jerez wrote:
> >> Iago Toral writes:
> >>
> >> > On Thu, 2015-07-30 at 15:58 +0300, Francisco Jerez
On Thu, 2015-09-03 at 13:15 +0300, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Wed, 2015-09-02 at 17:53 +0300, Francisco Jerez wrote:
> >> Iago Toral writes:
> >>
> >> > On Wed, 2015-09-02 at 14:29 +0300, Francisco Jerez wrote:
> >>
On Thu, 2015-09-03 at 13:52 +0300, Tapani Pälli wrote:
>
> On 09/03/2015 01:40 PM, Samuel Iglesias Gonsálvez wrote:
> >
> >
> > On 03/09/15 12:30, Tapani Pälli wrote:
> >> Hi;
> >>
> >> On 07/23/2015 09:42 AM, Samuel Iglesias Gonsalvez wrote:
> >>> v2:
> >>> - Add tessellation shader constants ass
On Thu, 2015-09-03 at 15:37 +0300, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Wed, 2015-09-02 at 14:32 +0300, Francisco Jerez wrote:
> >> Iago Toral writes:
> >>
> >> > On Thu, 2015-07-30 at 16:13 +0300, Francisco Jerez wrote:
> >&g
On Thu, 2015-09-03 at 15:37 +0300, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Wed, 2015-09-02 at 14:32 +0300, Francisco Jerez wrote:
> >> Iago Toral writes:
> >>
> >> > On Thu, 2015-07-30 at 16:13 +0300, Francisco Jerez wrote:
> >&g
I've just noticed that I never really added Ian in the CC...
On Thu, 2015-08-06 at 08:35 +0200, Iago Toral wrote:
> On Thu, 2015-08-06 at 08:53 +0300, Tapani Pälli wrote:
> > Reviewed-by: Tapani Pälli
> >
> > On 08/05/2015 11:30 AM, Iago Toral Quiroga wrote:
&
Jason, since that commit is yours, could you review this change? it is a
one liner.
Thanks,
Iago
On Tue, 2015-09-01 at 11:32 +0200, Iago Toral Quiroga wrote:
> Commit 2126c68e5cba killed the array elements parameter on load/store
> intrinsics that was stored in const_index[1]. It looks lik
Looks correct, based on the previous discussion about the same fix for
ReadPixels and TexImage. CopyTexImage has the same requirements.
Reviewed-by: Iago Toral Quiroga
On Sun, 2015-09-06 at 17:37 +0100, Chris Wilson wrote:
> glCopyTexImage behaves similarly to glReadPixels with respect to
Reviewed-by: Iago Toral Quiroga
On Mon, 2015-09-07 at 00:30 -0700, Kenneth Graunke wrote:
> This converts NIR intrinsics that load system values into Mesa's
> SYSTEM_VALUE_* enumerations.
>
> Signed-off-by: Kenneth Graunke
> ---
>
Reviewed-by: Iago Toral Quiroga
On Mon, 2015-09-07 at 00:30 -0700, Kenneth Graunke wrote:
> This code is all pretty much identical. We just needed the translation
> from one enum value to the other.
>
> Signed-off-by: Kenneth Graunke
> ---
> src/mesa/drivers/dri/i965/brw
Thanks! I think I would have squashed these together in one patch, it is
the same one-line fix in 4 consecutive lines after all. In any case,
this series is:
Reviewed-by: Iago Toral Quiroga
On Tue, 2015-09-08 at 20:21 +1000, Rhys Kidd wrote:
> Resolve a series of missing field initiali
Reviewed-by: Iago Toral Quiroga
On Mon, 2015-08-03 at 23:00 -0700, Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/glsl/builtin_variables.cpp | 2 ++
> src/glsl/shader_enums.h| 9 +
> 2 files changed, 11 insertions(+)
>
>
Reviewed-by: Iago Toral Quiroga
On Mon, 2015-08-03 at 23:00 -0700, Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/glsl/nir/nir_intrinsics.h | 1 +
> src/glsl/nir/nir_lower_system_values.c | 3 +++
> 2 files changed, 4 insertions(+)
>
> diff
On Thu, 2015-09-10 at 16:38 +0200, Iago Toral wrote:
> Reviewed-by: Iago Toral Quiroga
>
> On Mon, 2015-08-03 at 23:00 -0700, Jordan Justen wrote:
> > Signed-off-by: Jordan Justen
> > ---
> > src/glsl/builtin_variables.cpp | 2 ++
> > src/glsl/shader_enums.h
On Thu, 2015-09-10 at 15:17 -0400, Ilia Mirkin wrote:
> On Thu, Sep 10, 2015 at 2:52 PM, Ian Romanick wrote:
> > On 09/10/2015 10:45 AM, Ilia Mirkin wrote:
> >> On Thu, Sep 10, 2015 at 9:35 AM, Iago Toral Quiroga
> >> wrote:
> >>> From: Samuel Iglesias Gon
local_id_regs;
> + }
> + }
As it is now, local_id_regs can't be zero. I suppose that it could be
possible for it to be zero in the future if we end up implementing the
first of the optimizations you suggest above for the case where all the
components are 1 though... is that why yo
On Fri, 2015-09-11 at 09:24 +0200, Eduardo Lima Mitev wrote:
> Commit 1dbe4af9c9e318525fc082b542b93fb7f1e5efba
> "nir: Add a pass to lower outputs to temporary variables" messed up output
> variable names. The issue can be reproduced by dumping the NIR shaders
> with INTEL_DEBUG="vs,fs".
> ---
> s
Reviewed-by: Iago Toral Quiroga
On Thu, 2015-09-10 at 09:04 -0600, Brian Paul wrote:
> The sum of two unsigned ints is always >= 0. Found with Coverity.
> ---
> src/gallium/drivers/svga/svga_state_tss.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> dif
On Sun, 2015-09-13 at 11:51 -0400, Rob Clark wrote:
> From: Rob Clark
>
> Signed-off-by: Rob Clark
> ---
> src/Makefile.am | 1 +
> src/glsl/shader_enums.c | 202
> ++
> src/glsl/shader_enums.h | 53
> src/mesa/Makefile.
On Sun, 2015-09-13 at 11:51 -0400, Rob Clark wrote:
> From: Rob Clark
>
> Signed-off-by: Rob Clark
> ---
> src/glsl/nir/nir_print.c | 73
> ++--
> 1 file changed, 59 insertions(+), 14 deletions(-)
>
> diff --git a/src/glsl/nir/nir_print.c b/src/glsl
On Tue, 2015-09-15 at 08:07 -0400, Rob Clark wrote:
> On Tue, Sep 15, 2015 at 2:55 AM, Iago Toral wrote:
> > On Sun, 2015-09-13 at 11:51 -0400, Rob Clark wrote:
> >> From: Rob Clark
> >>
> >> Signed-off-by: Rob Clark
> >> ---
> >> src/Makef
On Tue, 2015-09-15 at 08:27 -0400, Rob Clark wrote:
> On Tue, Sep 15, 2015 at 3:18 AM, Iago Toral wrote:
> > On Sun, 2015-09-13 at 11:51 -0400, Rob Clark wrote:
> >> From: Rob Clark
> >>
> >> Signed-off-by: Rob Clark
> >
Thanks for all the explanations, this is:
Reviewed-by: Iago Toral Quiroga
On Tue, 2015-09-15 at 19:33 -0400, Rob Clark wrote:
> From: Rob Clark
>
> Signed-off-by: Rob Clark
> ---
> src/Makefile.am | 1 +
> src/glsl/shad
Reviewed-by: Iago Toral Quiroga
On Tue, 2015-09-15 at 19:33 -0400, Rob Clark wrote:
> From: Rob Clark
>
> v2: split out moving of FILE *fp into state structure into it's own
> (more complete patch) to reduce the noise in this one
>
> Signed-off-by: Rob Clark
> ---
&
Reviewed-by: Iago Toral Quiroga
On Tue, 2015-09-15 at 17:40 -0400, Rob Clark wrote:
> From: Rob Clark
>
> Signed-off-by: Rob Clark
> ---
> src/glsl/nir/nir.h| 3 +++
> src/glsl/nir/nir_opt_algebraic.py | 1 +
> 2 files changed, 4 insertions(+)
>
>
Looks good,
Reviewed-by: Iago Toral Quiroga
On Wed, 2015-09-16 at 08:25 -0400, Rob Clark wrote:
> From: Rob Clark
>
> Rename print_var_state to print_state, and stuff FILE ptr into the state
> object. This avoids passing around an extra parameter everywhere.
>
> v2: e
Hi Tapani, Kevin,
awesome work! I was curious about how to fix this, at least when I was
looking at the specs for this stuff it was not obvious that the Math
involved for this was so different, I only recall seeing the reference
that texure coordinates had to be normalized to a [-1, 1] space after
On Wed, 2015-09-16 at 12:32 -0700, Kenneth Graunke wrote:
> On Wednesday, September 16, 2015 11:17:53 AM Iago Toral Quiroga wrote:
> > It seems that we have some bugs where we fail to compile shaders in gen6
> > because we do not having enough MRF registers available (see bugs 8646
On Fri, 2015-09-18 at 15:02 +0300, Tapani Pälli wrote:
> Fixes bugs exposed by commit
> 2b1cdb0eddb73f62e4848d4b64840067f1f70865 in:
>ES3-CTS.gtf.GL3Tests.shadow.shadow_execution_frag
>
> No regressions observed in deqp, CTS or Piglit.
>
> v2: address review fee
On Fri, 2015-09-18 at 09:09 -0700, Kenneth Graunke wrote:
> On Friday, September 18, 2015 10:08:52 AM Iago Toral Quiroga wrote:
> > Until now we only used MRFs 1..15 for regular SEND messages, so the
> > message length could not possibly exceed the maximum size. Now that
> >
On Fri, 2015-09-18 at 13:02 -0700, Kristian Høgsberg wrote:
> On Thu, Sep 10, 2015 at 03:35:54PM +0200, Iago Toral Quiroga wrote:
> > ---
> > src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 148
> > +
> > 1 file changed, 148 insertions(+)
>
Hi Kristian,
On Fri, 2015-09-18 at 16:56 -0700, Kristian Høgsberg wrote:
> On Thu, Sep 10, 2015 at 03:35:16PM +0200, Iago Toral Quiroga wrote:
> > Hi,
> >
> > this is the latest version of the ARB_shader_storage_buffer_object
> > implementation. A good part of the
On Mon, 2015-09-21 at 09:15 +0300, Tapani Pälli wrote:
> Patch fixes a crash in conformance test that tries out different
> invalid arguments for glShaderSource and glGetShaderSource:
>
>ES2-CTS.gtf.GL.glGetShaderSource.getshadersource_programhandle
>
> This is a regression from commit:
>
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