The patch adds GoP (group of ports) initialization functions. The mvpp2
driver was relying on the firmware/bootloader initialization; this patch
moves this setup to the mvpp2 driver.
Signed-off-by: Antoine Tenart
Tested-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 170
Hi Andrew,
On Tue, Aug 22, 2017 at 08:07:57PM +0200, Andrew Lunn wrote:
> On Tue, Aug 22, 2017 at 07:08:20PM +0200, Antoine Tenart wrote:
> >
> > This is based on net-next (e2a7c34fb285).
> >
> > I removed the GoP interrupt and PHY optional parts in this v2 to ease
&g
The TSO header size was defined in many drivers. Factorize the code and
define its size in net/tso.h.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/cavium/thunder/nicvf_queues.h | 1 -
drivers/net/ethernet/freescale/fec_main.c | 1 -
drivers/net/ethernet/marvell/mv643xx_eth.c
The txq size is defined by MVPP2_AGGR_TXQ_SIZE, which is sometime not
used directly but through variables. As it is a fixed value use the
define everywhere in the driver.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 11 +--
1 file changed, 5 insertions(+), 6
(from 25% to 15%).
Thanks!
Antoine
Antoine Tenart (3):
net: define the TSO header size in net/tso.h
net: mvpp2: unify the txq size define use
net: mvpp2: software tso support
drivers/net/ethernet/cavium/thunder/nicvf_queues.h | 1 -
drivers/net/ethernet/freescale/fec_main.c | 1
The patch uses the tso API to implement the tso functionality in Marvell
PPv2 driver.
Using iperf and 10G ports, using TSO shows a significant performance
improvement by a factor 2 to reach around 9.5Gbps in TX; as well as a
significant CPU usage drop (from 25% to 15%).
Signed-off-by: Antoine
Hi Baruch,
On Wed, Aug 23, 2017 at 10:28:42AM +0300, Baruch Siach wrote:
> On Tue, Aug 22, 2017 at 07:08:30PM +0200, Antoine Tenart wrote:
> > This patch enables the two GE/SFP ports. They are configured in 10GKR
> > mode by default. To do this the cpm_xdmio is enabled as well,
Hi Andrew, Russell,
On Wed, Jul 26, 2017 at 06:26:48PM +0200, Andrew Lunn wrote:
> On Mon, Jul 24, 2017 at 03:48:40PM +0200, Antoine Tenart wrote:
> > This patch adds the GoP link interrupt support for when a port isn't
> > connected to a PHY. Because of this the phylib call
On Wed, Aug 23, 2017 at 03:24:55PM +, Stefan Chulski wrote:
> > When the cable is connected (there is signal) and the serdes is in sync and
> > AN
> > succeeded.
> >
> > > With SFF/SFP ports, you generally need a gpio line the fibre module
> > > can use to indicate if it has link. Fixed-phy h
are supported by the comphy driver: sgmii
and 10gkr.
Signed-off-by: Antoine Tenart
---
drivers/phy/marvell/Kconfig | 10 +
drivers/phy/marvell/Makefile | 1 +
drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 656 +++
3 files changed, 667
Now that the comphy driver is available, this patch adds the
corresponding nodes in the cp110 master and slave device trees.
Signed-off-by: Antoine Tenart
---
.../boot/dts/marvell/armada-cp110-master.dtsi | 38 ++
.../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 38
This patch extends on both cp110 the system register area length to
include some of the comphy registers as well.
Signed-off-by: Antoine Tenart
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 2 +-
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 2 +-
2 files changed, 2
.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 21 -
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index e9fd4fa81a2e..31903c2a41c5 100644
--- a/drivers/net
itself. The queues are now stopped as well, and
the netif carrier helpers are called.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2
This patch adds an extra check when the link_event function is called,
so that it won't do anything when the netif isn't running.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/ethernet/marvell/
The link mode (speed, duplex) was forced based on what the phylib
returns. This should not be the case, and only forced by ethtool
functions manually. This patch removes the link mode enforcement from
the phylib link_event callback.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell
The link_event function is somewhat complicated. This cosmetic patch
simplifies it.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net
relying on the bootloader.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 44 +++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index 7fa251bf91ae
r still as before an relies on the
firmware/bootloader configuration).
Finally there are dt/defconfig patches to describe and take advantage of
this.
This was tested on a range of devices: 8040-db, 8040-mcbin and 7040-db.
Thanks!
Antoine
Antoine Tenart (12):
phy: add sgmii and 10gkr mo
This patch adds more PHY modes to the phy_mode enum, to allow
configuring PHYs to the SGMII and/or the 10GKR mode by using the
set_mode callback.
Signed-off-by: Antoine Tenart
---
include/linux/phy/phy.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/phy/phy.h b/include
The Marvell Armada 7K/8K SoCs contains an hardware block called COMPHY
that provides a number of shared PHYs used by various interfaces in the
SoC: network, SATA, PCIe, etc. This Device Tree binding allows to
describe this COMPHY hardware block.
Signed-off-by: Antoine Tenart
---
.../devicetree
From: Miquel Raynal
The comphy is an hardware block giving access to common PHYs that can be
used by various other engines (Network, SATA, ...). This is used on
Marvell 7k/8k platforms for now. Enable the corresponding driver.
Signed-off-by: Miquel Raynal
Signed-off-by: Antoine Tenart
This patch adds comphy phandles to the Ethernet ports in the mcbin
device tree. The comphy is used to configure the serdes PHYs used by
these ports.
Signed-off-by: Antoine Tenart
---
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch
the h/w mac is valid when
actually retrieving a mac from h/w.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
ports handled by this PPv2 driver.
Fixes this by initializing the h/w mac address variable to {0}, which is
an invalid mac address value. This way the random assignation fallback
is called and all ports end up with their own addresses.
Signed-off-by: Antoine Tenart
Fixes: 2697582144dd ("net: mvp
The MAC retrieval has a quite complicated logic (which is broken). Moves
it to its own function to prepare for patches fixing its logic, so that
reviews are easier.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 45 +---
1 file changed
this or if I should do
something else.
Thanks!
Antoine
Fixes: 2697582144dd ("net: mvpp2: handle misc PPv2.1/PPv2.2 differences")
Antoine Tenart (4):
net: mvpp2: fix the mac address used when using PPv2.2
net: mvpp2: move the mac retrieval/copy logic into its own function
net: mvpp
When using a mac address described in the device tree, a check is made
to see if it is valid. When it's not, no fallback is defined. This
patches tries to get the mac address from h/w (or use a random one if
the h/w one isn't valid) when the dt mac address isn't valid.
Signed-
Hi Marcin,
On Wed, Aug 23, 2017 at 11:05:33PM +0200, Marcin Wojtas wrote:
> 2017-08-23 18:04 GMT+02:00 Antoine Tenart :
> > On Wed, Aug 23, 2017 at 03:24:55PM +, Stefan Chulski wrote:
> >> > When the cable is connected (there is signal) and the serdes is i
Hi Andrew,
On Thu, Aug 24, 2017 at 03:19:38PM +0200, Andrew Lunn wrote:
> On Thu, Aug 24, 2017 at 10:38:11AM +0200, Antoine Tenart wrote:
> > This patch adds more PHY modes to the phy_mode enum, to allow
> > configuring PHYs to the SGMII and/or the 10GKR mode by using the
> &
Hi Andrew,
On Thu, Aug 24, 2017 at 03:39:22PM +0200, Andrew Lunn wrote:
> > +static const struct mvebu_comhy_conf mvebu_comphy_modes[] = {
> > + /* lane 0 */
> > + MVEBU_COMPHY_CONF(0, 1, PHY_MODE_SGMII, 0x1),
> > + /* lane 1 */
> > + MVEBU_COMPHY_CONF(1, 2, PHY_MODE_SGMII, 0x1),
> > + /
Hi Andrew,
On Thu, Aug 24, 2017 at 03:45:04PM +0200, Andrew Lunn wrote:
> > + for_each_available_child_of_node(pdev->dev.of_node, child) {
> > + struct mvebu_comphy_lane *lane;
> > + struct phy *phy;
> > + int ret;
> > + u32 val;
> > +
> > + ret
Hi Stefan,
On Thu, Aug 24, 2017 at 01:57:04PM +, Stefan Chulski wrote:
>
> > > How would you name it if not "comphy-cp110"?
> >
> > Good question...
> >
> > '7000-cpmphy-cp110'
> > '8000-cpmphy-cp110'
> >
> > ??
> >
> > Andrew
>
> A8K Marvell SoC has two South Bridge communication co
Hi Andrew,
On Thu, Aug 24, 2017 at 03:58:13PM +0200, Andrew Lunn wrote:
> > @@ -189,6 +191,7 @@
> > status = "okay";
> > phy = <&ge_phy>;
> > phy-mode = "sgmii";
> > + phys = <&cps_comphy0 1>;
>
> Does the binding document describe the meaning of the specifier?
Ahhh no you're right
Hi Andrew,
On Thu, Aug 24, 2017 at 04:06:25PM +0200, Andrew Lunn wrote:
> On Thu, Aug 24, 2017 at 10:38:17AM +0200, Antoine Tenart wrote:
> > @@ -5753,14 +5753,24 @@ static void mvpp2_link_event(struct net_device *dev)
> > port->link = phydev->link;
> >
Hi Andrew,
On Thu, Aug 24, 2017 at 04:56:09PM +0200, Andrew Lunn wrote:
> On Thu, Aug 24, 2017 at 10:38:19AM +0200, Antoine Tenart wrote:
> > This patch adds logic to reconfigure the comphy/gop when the link status
> > change at runtime. This is very useful on boards such as
On Thu, Aug 24, 2017 at 06:01:24PM +0200, Andrew Lunn wrote:
> On Thu, Aug 24, 2017 at 05:52:41PM +0200, Antoine Tenart wrote:
> > On Thu, Aug 24, 2017 at 04:56:09PM +0200, Andrew Lunn wrote:
> > > On Thu, Aug 24, 2017 at 10:38:19AM +0200, Antoine Tenart wrote:
> > >
On Thu, Aug 24, 2017 at 06:04:01PM +0100, Russell King - ARM Linux wrote:
> On Thu, Aug 24, 2017 at 06:57:43PM +0200, Andrew Lunn wrote:
> > > I see what could be the issue but I do not understand one aspect though:
> > > how could we switch from one PHY to another, as there's only one output
> > >
On Thu, Aug 24, 2017 at 05:08:29PM +, Stefan Chulski wrote:
> > > Imagine phylib is using the copper Ethernet PHY, but the MAC is using
> > > the SFP port. Somebody pulls out the copper cable, phylib says the
> > > link is down, turns the carrier off and calls the callback. Not good,
> > > sinc
The MVPP22_XLG_CTRL1_FRAMESIZELIMIT define is used as an offset, but is
defined as BIT(0). Updated its name to contains "OFFS" as in offset and
fix its value using the offset value, 0.
Reported-by: Stefan Chulski
Signed-off-by: Antoine Tenart
Fixes: 76eb1b1de5b6 ("net: mvpp2: set
Hi Dave,
On Thu, Aug 24, 2017 at 09:46:24PM -0700, David Miller wrote:
> From: Antoine Tenart
> Date: Thu, 24 Aug 2017 11:46:54 +0200
>
> > The MAC address retrieval logic was broken and when using the PPv2
> > driver on PPv2.2 engines I ended up using the same mac add
The MAC retrieval has a quite complicated logic (which is broken). Moves
it to its own function to prepare for patches fixing its logic, so that
reviews are easier.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 45 +---
1 file changed
relevant stable trees (4.12+).
The series applies on net/master (9b4e946ce14e).
Thanks!
Antoine
Since v1:
- Rebased onto net (was on net-next).
Antoine Tenart (4):
net: mvpp2: fix the mac address used when using PPv2.2
net: mvpp2: move the mac retrieval/copy logic into its own function
When using a mac address described in the device tree, a check is made
to see if it is valid. When it's not, no fallback is defined. This
patches tries to get the mac address from h/w (or use a random one if
the h/w one isn't valid) when the dt mac address isn't valid.
Signed-
the h/w mac is valid when
actually retrieving a mac from h/w.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
ports handled by this PPv2 driver.
Fixes this by initializing the h/w mac address variable to {0}, which is
an invalid mac address value. This way the random assignation fallback
is called and all ports end up with their own addresses.
Signed-off-by: Antoine Tenart
Fixes: 2697582144dd ("net: mvp
Hi Andrew,
On Fri, Aug 25, 2017 at 04:19:39PM +0200, Andrew Lunn wrote:
> On Fri, Aug 25, 2017 at 04:14:17PM +0200, Antoine Tenart wrote:
> > The mac address is only retrieved from h/w when using PPv2.1. Otherwise
> > the variable holding it is still checked and used if it c
This patch adds comphy phandles to the Ethernet ports in the mcbin
device tree. The comphy is used to configure the serdes PHYs used by
these ports.
Signed-off-by: Antoine Tenart
---
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch
This patch adds comphy phandles to the Ethernet ports in the 7040-db
device tree. The comphy is used to configure the serdes PHYs used by
these ports.
Signed-off-by: Antoine Tenart
---
arch/arm64/boot/dts/marvell/armada-7040-db.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64
From: Miquel Raynal
The comphy is an hardware block giving access to common PHYs that can be
used by various other engines (Network, SATA, ...). This is used on
Marvell 7k/8k platforms for now. Enable the corresponding driver.
Signed-off-by: Miquel Raynal
Signed-off-by: Antoine Tenart
The link_event function is somewhat complicated. This cosmetic patch
simplifies it.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net
Now that the comphy driver is available, this patch adds the
corresponding nodes in the cp110 master and slave device trees.
Signed-off-by: Antoine Tenart
---
.../boot/dts/marvell/armada-cp110-master.dtsi | 38 ++
.../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 38
This patch extends on both cp110 the system register area length to
include some of the comphy registers as well.
Signed-off-by: Antoine Tenart
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 2 +-
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 2 +-
2 files changed, 2
This patch adds an extra check when the link_event function is called,
so that it won't do anything when the netif isn't running.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/ethernet/marvell/
The link mode (speed, duplex) was forced based on what the phylib
returns. This should not be the case, and only forced by ethtool
functions manually. This patch removes the link mode enforcement from
the phylib link_event callback.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell
relying on the bootloader.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 44 +++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index e312dfc3555b
ebased on the latest net-next/master.
Antoine Tenart (13):
phy: add sgmii and 10gkr modes to the phy_mode enum
phy: add the mvebu cp110 comphy driver
Documentation/bindings: phy: document the Marvell comphy driver
net: mvpp2: initialize the comphy
net: mvpp2: do not force the link mode
itself. The queues are now stopped as well, and
the netif carrier helpers are called.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2
This patch adds more generic PHY modes to the phy_mode enum, to
allow configuring generic PHYs to the SGMII and/or the 10GKR mode
by using the set_mode callback.
Signed-off-by: Antoine Tenart
---
include/linux/phy/phy.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/phy
.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 21 -
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index 49a6789a4142..04e0c8ab7b51 100644
--- a/drivers/net
are supported by the comphy driver: sgmii
and 10gkr.
Signed-off-by: Antoine Tenart
---
drivers/phy/marvell/Kconfig | 10 +
drivers/phy/marvell/Makefile | 1 +
drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 656 +++
3 files changed, 667
The Marvell Armada 7K/8K SoCs contains an hardware block called COMPHY
that provides a number of shared PHYs used by various interfaces in the
SoC: network, SATA, PCIe, etc. This Device Tree binding allows to
describe this COMPHY hardware block.
Signed-off-by: Antoine Tenart
---
.../devicetree
On Fri, Aug 25, 2017 at 05:42:47PM +0200, Andrew Lunn wrote:
> > So probably the best way to handle this would have been to send 1/4 to
> > net and 2-4/4 to net-next
>
> Correct.
>
> > (but then there's a dependency between the two series).
>
> Dave merges net into net-next every so often. So y
Hi Andrew,
On Fri, Aug 25, 2017 at 05:51:11PM +0200, Andrew Lunn wrote:
> > - Checked if the carrier_on/off functions were needed. They are.
>
> Could you explain the situations they are needed in?
>
> Quite a few drivers do this, so i'm not saying it is wrong. But it
> would be nice to under
Hi Florian,
On Fri, Aug 25, 2017 at 09:49:15AM -0700, Florian Fainelli wrote:
> On 08/25/2017 07:48 AM, Antoine Tenart wrote:
> > This patch adds an extra check when the link_event function is called,
> > so that it won't do anything when the netif isn't running.
>
&
Hi Russell,
On Fri, Aug 25, 2017 at 11:46:16PM +0100, Russell King - ARM Linux wrote:
> On Fri, Aug 25, 2017 at 04:48:16PM +0200, Antoine Tenart wrote:
> > This patch adds logic to reconfigure the comphy/gop when the link status
> > change at runtime. This is very useful on boa
Hi Russell,
On Fri, Aug 25, 2017 at 11:43:13PM +0100, Russell King - ARM Linux wrote:
> On Fri, Aug 25, 2017 at 04:48:12PM +0200, Antoine Tenart wrote:
> > The link mode (speed, duplex) was forced based on what the phylib
> > returns. This should not be the case, and only fo
On Mon, Aug 28, 2017 at 09:51:52AM +0100, Russell King - ARM Linux wrote:
> On Mon, Aug 28, 2017 at 10:38:37AM +0200, Marcin Wojtas wrote:
> >
> > Can you be 100% sure that when using SGMII with PHY's (like Marvell
> > Alaska 88E1xxx series), is in-band link information always available?
> > I'd be
On Mon, Aug 28, 2017 at 12:06:24PM +0100, Russell King - ARM Linux wrote:
> On Mon, Aug 28, 2017 at 11:40:51AM +0200, Antoine Tenart wrote:
> > On Mon, Aug 28, 2017 at 09:51:52AM +0100, Russell King - ARM Linux wrote:
> > > On Mon, Aug 28, 2017 at 10:38:37AM +0200, M
itself. The queues are now stopped as well, and
the netif carrier helpers are called.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2
are supported by the comphy driver: sgmii
and 10gkr.
Signed-off-by: Antoine Tenart
---
drivers/phy/marvell/Kconfig | 10 +
drivers/phy/marvell/Makefile | 1 +
drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 656 +++
3 files changed, 667
The Marvell Armada 7K/8K SoCs contains an hardware block called COMPHY
that provides a number of shared PHYs used by various interfaces in the
SoC: network, SATA, PCIe, etc. This Device Tree binding allows to
describe this COMPHY hardware block.
Signed-off-by: Antoine Tenart
---
.../devicetree
This patch adds comphy phandles to the Ethernet ports in the mcbin
device tree. The comphy is used to configure the serdes PHYs used by
these ports.
Signed-off-by: Antoine Tenart
---
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch
From: Miquel Raynal
The comphy is an hardware block giving access to common PHYs that can be
used by various other engines (Network, SATA, ...). This is used on
Marvell 7k/8k platforms for now. Enable the corresponding driver.
Signed-off-by: Miquel Raynal
Signed-off-by: Antoine Tenart
in it.
- Documented the PHY cell argument in the dt documentation.
- New patch adding comphy phandles for the 7040-db board.
- Checked if the carrier_on/off functions were needed. They are.
- s/PHY/generic PHY/ in commit log of patch 1.
- Rebased on the latest net-next/master.
Antoine Ten
This patch adds comphy phandles to the Ethernet ports in the 7040-db
device tree. The comphy is used to configure the serdes PHYs used by
these ports.
Signed-off-by: Antoine Tenart
---
arch/arm64/boot/dts/marvell/armada-7040-db.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64
This patch extends on both cp110 the system register area length to
include some of the comphy registers as well.
Signed-off-by: Antoine Tenart
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 2 +-
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 2 +-
2 files changed, 2
relying on the bootloader.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 44 +++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index e312dfc3555b
The link_event function is somewhat complicated. This cosmetic patch
simplifies it.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net
When using the XLG MAC, it does not make sense to force the GMAC autoneg
parameters. This patch adds checks to only set the GMAC autoneg
parameters when needed (i.e. when not using the XLG MAC).
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 64
: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2.c | 21 -
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index 2f05a0b0773c..9e64b1ba3d43 100644
--- a/drivers/net/ethernet
This patch adds more generic PHY modes to the phy_mode enum, to
allow configuring generic PHYs to the SGMII and/or the 10GKR mode
by using the set_mode callback.
Signed-off-by: Antoine Tenart
---
include/linux/phy/phy.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/phy
Now that the comphy driver is available, this patch adds the
corresponding nodes in the cp110 master and slave device trees.
Signed-off-by: Antoine Tenart
---
.../boot/dts/marvell/armada-cp110-master.dtsi | 38 ++
.../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 38
Hello,
On Wed, Jul 24, 2019 at 10:17:11AM +0200, Antoine Tenart wrote:
> This patch adds a description of the PTP ready interrupt, which can be
> triggered when a PTP timestamp is available on an hardware FIFO.
>
> Signed-off-by: Antoine Tenart
> Acked-by: Paul Burton
The net
We had a check in the mvpp2_mac_link_down() function (called by phylink)
to avoid disabling the port when link interrupts are used. It turned out
the interrupt can still be used with the port disabled. We can thus
remove this check.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell
d-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2/mvpp2.h| 1 +
.../net/ethernet/marvell/mvpp2/mvpp2_main.c | 62 ---
2 files changed, 55 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
b/drivers/net/ethernet/marvell/
This patch makes sure both PPv2 MACs (GMAC + XLG MAC) are set in reset
while a port is reconfigured. This is done so that we make sure a MAC is
in a reset state when not used, as only one of the two will be set out
of reset after the port is configured properly.
Signed-off-by: Antoine Tenart
This patch adds calls in the stop() helper to ensure both MACs and
both PCS blocks are set in reset when the user manually sets a port
down. This is done so that we have the exact same block reset states at
boot time and when a port is set down.
Signed-off-by: Antoine Tenart
---
drivers/net
where all blocks are disabled
when not used, and only enabled regarding the current mode used on a
given port.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/marvell
cases where some of those parameters were updated, but
not taken into account, such as when using RGMII interfaces.
Fixes: d14e078f23cc ("net: marvell: mvpp2: only reprogram what is necessary on
mac_config")
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2/mvpp2_m
similar way (the GMAC already is set in reset at boot
time).
Signed-off-by: Antoine Tenart
---
.../net/ethernet/marvell/mvpp2/mvpp2_main.c | 27 ---
1 file changed, 18 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
b/drivers/net
This patch force the XLG MAC link state in the phylink link_up() and
link_down() helpers when not using in-band auto-negotiation. This mimics
what's already done for the GMAC and follows what's advised in the
phylink documentation.
Signed-off-by: Antoine Tenart
---
drivers/net/ethern
: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
index b27966355df9..59ee9e7545b0 100644
--- a
t in reset, and only the one used
should be put out of reset.
4. Link down: all four blocks are put in reset.
Thanks!
Antoine
Antoine Tenart (15):
net: mvpp2: fix a typo in the header
net: mvpp2: update the port documentation regarding the GoP
net: mvpp2: fix alignment of MVPP2_GMAC_C
The Marvell PPv2 port structure stores the GoP id of a given port. This
information is specific to PPv2.2, but cannot be used by PPv2.1. Update
its comment to denote this specificity.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 2 +-
1 file changed, 1
This cosmetic patch fixes a typo made in a comment in the Marvell PPv2
Ethernet driver header.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
b/drivers
This patch adds a check on the PPv2 version in-use not to reconfigure
the port mode when an interface is updated when using PPv2.1 as the
functions called are PPv2.2 specific.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 14 ++
1 file changed
Cosmetic patch fix the alignment of the MVPP2_GMAC_CONFIG_MII_SPEED
macro definition.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
b/drivers/net
.
Fixes: 0fb628f0f250 ("net: mvpp2: fix phylink handling of invalid PHY modes")
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
b/drivers/ne
When the 88x2110 PHY support was added, the suspend and resume callbacks
were forgotten. This patch adds them to the 88x2110 PHY callback
definition.
Signed-off-by: Antoine Tenart
---
drivers/net/phy/marvell10g.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/phy/marvell10g.c
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