On 20/05/15 08:11, Alexandre Courbot wrote:
On Fri, May 15, 2015 at 8:39 PM, Maarten Lankhorst
wrote:
Op 15-05-15 om 09:11 schreef Alexandre Courbot:
Re-pinging Marteen on an email address that still exists :P
On Wed, Apr 22, 2015 at 6:08 PM, Alexandre Courbot wrote:
On Sun, Mar 15, 2015 at
From: Ari Hirvonen
Add new NOUVEAU_GEM_SET_TILING ioctl to set correct tiling
mode for imported dma-bufs. This ioctl is staging for now.
Signed-off-by: Ari Hirvonen
[acour...@nvidia.com: carry upstream, fix style]
Signed-off-by: Alexandre Courbot
---
drm/nouveau/nouveau_drm.c | 1 +
Add a module option allowing to enable staging/unstable APIs. This will
allow us to experiment freely with experimental APIs for a while before
setting them in stone.
Signed-off-by: Alexandre Courbot
---
drm/nouveau/nouveau_drm.c | 18 ++
drm/nouveau/uapi/drm/nouveau_drm
This patchset proposes to introduce a "staging" module option to dynamically
enable features (mostly ioctls) that are merged but may be refined before
they are declared "stable". The second patch illustrates the use of this
staging option with the SET_TILING ioctl, which can be used to specify the
On Fri, May 15, 2015 at 8:39 PM, Maarten Lankhorst
wrote:
> Op 15-05-15 om 09:11 schreef Alexandre Courbot:
>> Re-pinging Marteen on an email address that still exists :P
>>
>> On Wed, Apr 22, 2015 at 6:08 PM, Alexandre Courbot wrote:
>>> On Sun, Mar 15, 2015 at 5:41 PM, Alexandre Courbot
>>> w
https://bugs.freedesktop.org/show_bug.cgi?id=90513
--- Comment #2 from Ilia Mirkin ---
Confirmed that I get redness coming in on that draw on my GK208, whereas it's
fine on i965.
There are a few awkward things, but nothing completely ridiculous:
1. 4096x4096 srgb dxt1/5 textures, specifically G
On Tue, May 19, 2015 at 4:35 PM, Martin Peres wrote:
> On 19/05/15 23:28, Ilia Mirkin wrote:
>>
>> A 32-bit shift is a no-op, which will also make the new planemask get
>> or'd with ~0, thus negating the usefulness of the subsequent
>> planemask != ~0 check. Only do this if it's a less-than-32-bit
On 19/05/15 23:28, Ilia Mirkin wrote:
A 32-bit shift is a no-op, which will also make the new planemask get
or'd with ~0, thus negating the usefulness of the subsequent
planemask != ~0 check. Only do this if it's a less-than-32-bit per pixel
format, in which case it will have the desired effect o
A 32-bit shift is a no-op, which will also make the new planemask get
or'd with ~0, thus negating the usefulness of the subsequent
planemask != ~0 check. Only do this if it's a less-than-32-bit per pixel
format, in which case it will have the desired effect of setting the
high bits.
Signed-off-by:
Pre-nv50 has all sorts of funny requirements for non-copy alu
operations, and will bail out of solid fills left and right. Account for
that case and fall back to the memset.
Reported-by: Andrew Randrianasulu
Signed-off-by: Ilia Mirkin
---
src/drmmode_display.c | 13 -
1 file changed
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