upport it. Not sure how to tell gdb that it does.
6.
Is there a way to "hot-sync" with a running target?
7.
What's needed to let gdb or Eclipse "know" what regions of memory need
hardware breakpoints?
I'm sure I'll have other questions as my work proceeds, but th
On Tue, 2015-05-05 at 11:37 +0200, Andreas Fritiofson wrote:
> On Tue, May 5, 2015 at 12:28 AM, James Murray wrote:
> 4.
> What's the correct way to live view memory or variables?
> I have not seen this feature working in Eclipse nor GDB. For memory, I
&g
> From: acala...@free.fr
>
> I am currently implementing OpenOCD support for the xPC56
> microcontrollers, but I am facing some difficulties. These MCUs are
> developed by NXP/Freescale (MPC56xx) and STM (SPC56x) and based on a
> PowerPC E200 core.
Hi,
I did some work on OpenOCD a couple of years
Antoine,
The work I did wasn't finished enough to release it, but it did work
(just about) well enough that I was able to use it myself.
I updated it to the current version of OpenOCD and could send you a
patch if you want?
I was able to find enough information to figure out how the JTAG/OnCE
int
I've created a "diff -u" of my changes against a pull from git on 2017-
09-25.
http://www.jamesmurrayengineering.co.uk/files/openocd-mpc5xxx-jsm-20170
927.diff.zip
Hopefully that is clean enough, without too much cruft and does include
all needed files.
Recent comments seem to be suggesting that
On Sat, 2018-01-13 at 14:12 -0500, David Riley wrote:
> > It depends on the PPC; the ones that are unlikely to be supported
> > any
> time in OpenOCD are the e300 cores (e.g. MPC83xx series among
> others), which have a very different debug model which apparently
> involves boatloads of proprietary
I had been using OpenOCD with an STM32F769 and debug worked fine. I
have just switched to an STM32F746 and OpenOCD reports:
Open On-Chip Debugger 0.10.0+dev-00608-g68f09de (2018-12-10-13:40)
...
Info : STLINK V2J29M18 (API v2) VID:PID 0483:374B
Info : Target voltage: 3.238270
Warn : Silicon bug: s
In the digest email today, I saw a commit of files for the NXP
(Freescale) 56xx and 57xx targets.
What's new since my work of 2015-7 ?
At that time, 56xx was working enough for me to debug that a MPC5634M.
57XX was very incomplete and I think I'd only really got as far as
talking to the chip.
I
On Wed, 2021-04-07 at 06:44 +0200, Oleksij Rempel wrote:
> Hi James,
>
> Am 07.04.21 um 00:38 schrieb James Murray:
> >
> > In the digest email today, I saw a commit of files for the NXP
> > (Freescale) 56xx and 57xx targets.
> >
> > What's new since
On Mon, 2021-05-03 at 13:07 +, openocd-devel-
requ...@lists.sourceforge.net wrote:
> commit ba597976279422fdab7928f763d7c78027340075
> Author: Antonio Borneo
> Date: Sun May 2 23:03:33 2021 +0200
>
> Prefer 'unsigned int' to 'int'.
>
Maybe this has been covered before, but is ther
> > On 7 Aug 2023, at 10:45, Tomas Vanek
> > wrote:
> >
> > The problem with a debug break induced into an interrupt handler is
> > same as we observed
> > in other Cortex-M7 versions.
>
> ok, so probably all STM Cortex-M7 cores are affected.
>
> did you inform someone at STM/Arm?
>
> > Curre
ile contains generic instructions for running 'configure'
and compiling the OpenOCD source code.
"
However, there is no INSTALL file.
regards
James Murray
On Sat, 2023-10-28 at 16:09 +, Tommy Murphy wrote:
> I presume that it should refer to the HACKING file and maybe the
> INSTALL file used to exist but was removed/renamed at some stage?
>
> https://sourceforge.net/p/openocd/code/ci/master/tree/HACKING
I remembered that I needed to run a boots
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