Re: [Qemu-devel] [PATCH v3 3/8] target/mips: Update some CP0 registers bit definitions

Hi Aleksandar, On 07/04/2018 04:30 PM, Aleksandar Markovic wrote: > From: Aleksandar Markovic > > Update CP0 registers Config0, Config1, and Config5 bit definitions. > > Some of these bits will be utilized by upcoming nanoMIPS changes. > > Signed-off-by: Aleksandar Markovic > --- > target/mi

[Qemu-devel] [PATCH v3 3/8] target/mips: Update some CP0 registers bit definitions

From: Aleksandar Markovic Update CP0 registers Config0, Config1, and Config5 bit definitions. Some of these bits will be utilized by upcoming nanoMIPS changes. Signed-off-by: Aleksandar Markovic --- target/mips/cpu.h | 41 - 1 file changed, 28 insertion